component
XC6221A332MR-G
Public Made by Adomby adom
Torex Semicon Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownXC6221A332MR-G
Torex Semicon · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25
XC6221A332MR-G from Torex Semicon, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input pin. Operating range 1.6V to 6.0V; absolute maximum VSS-0.3V to +6.5V. A 1.0µF ceramic bypass capacitor is recommended close to the pin. |
| 2 | VSS | power_in | Ground reference for the regulator and CE logic threshold. |
| 3 | CE | input | Chip Enable (ON/OFF control). Active HIGH: VCE >= 1.2V (typ up to 6.0V) turns the regulator ON; VCE <= 0.3V turns it OFF (standby, IDD < 0.1µA). XC6221A has no internal CE pull-down, so an open/floating CE is an undefined state and must be driven externally. |
| 4 | NC | unconnected | No internal connection. Can be left floating or tied to VSS for board-layout convenience. |
| 5 | VOUT | power_out | Regulated output pin, 3.3V nominal, ±2% accuracy, up to 250mA (typ). Requires a 1.0µF ceramic stabilization capacitor to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Torex Semicon |
| Package | SOT-25 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
XC6221A332MR-GXC6221A332MR-GGRXC6221A332MR-GGR-GXC6221A332MR-GNRXC6221A332MR-GNR-GXC6221A332MR-G7R-G
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage, standard accuracy (3.30V nominal, from voltage chart) | VOUT(E) | 3.234 | 3.366 | V | VCE=VIN, IOUT=10mA; VOUT(T)=3.30V, standard (+2%) accuracy, per output voltage chart | 6 | |
| Output current (limit-type rating) | IOUTMAX | 200 | 250 | mA | VCE=VIN, VIN=VOUT(T)+1.0V, 0.80V<VOUT(T)<5.00V | 5 | |
| Load regulation | UVOUT | 10 | 40 | mV | VCE=VIN, 0.1mA ≤ IOUT ≤ 100mA | 5 | |
| Dropout voltage (3.30V, from voltage chart) | Vdif | 80 | 140 | mV | VCE=VIN, IOUT=100mA | 7 | |
| Supply current | IDD | 25 | 50 | μA | VCE=VIN, VIN=VOUT(T)+1.0V | 5 | |
| Standby current | ISTB | 0.01 | 0.1 | μA | VIN=6.0V, VCE=VSS | 5 | |
| Line regulation | UVOUT / (UVIN·VOUT) | 0.01 | 0.2 | %/V | VOUT(T)+0.5V ≤ VIN ≤ 6.0V, VOUT(T) ≥ 1.10V, VCE=VIN, IOUT=10mA | 5 | |
| Input voltage | VIN | 1.6 | 6 | V | 5 | ||
| Output voltage temperature coefficient | UVOUT / (UTopr·VOUT) | -100 | 100 | ppm/°C | VCE=VIN, IOUT=30mA, -40<Topr<85 | 5 | |
| Ripple rejection rate (0.85V≤VOUT(T)≤4.00V row) | PSRR | 60 | dB | VIN=VOUT(T)+1.0 VDC+0.5Vp-pAC, VCE=VIN, IOUT=30mA, f=1kHz | 5 | ||
| Limit current | ILIM | 200 | 250 | mA | VCE=VIN | 5 | |
| CE high level voltage | VCEH | 1.2 | 6 | V | 5 | ||
| CE low level voltage | VCEL | 0.3 | V | 5 | |||
| CE high level current (XC6221A/B) | ICEH | -0.1 | 0.1 | μA | VCE=VIN (XC6221A/B) | 5 | |
| CE low level current | ICEL | -0.1 | 0.1 | μA | VCE=VSS | 5 | |
| Input voltage (absolute maximum) | VIN | 6.5 | V | Rated range VSS-0.3 to +6.5 V; minimum given relative to VSS | 4 | ||
| Output current (absolute maximum) | IOUT | 400 | mA | Note *1: IOUT ≤ Pd/(VIN-VOUT) | 4 | ||
| CE input voltage (absolute maximum) | VCE | 6.5 | V | Rated range VSS-0.3 to +6.5 V; minimum given relative to VSS | 4 | ||
| Power dissipation, SOT-25 (PCB mounted) | Pd | 600 | mW | SOT-25, PCB mounted (example data, see note *2) | 4 | ||
| Power dissipation, SOT-25 (not PCB mounted) | Pd | 250 | mW | SOT-25, values not PCB mounted | 4 | ||
| Operating ambient temperature | Topr | -40 | 85 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 125 | °C | 4 | ||
| Thermal resistance, SOT-25 (board mount) | θJA | 166.67 | °C/W | SOT-25, board mount, Tj max 125°C, natural convection (reference data) | 22 |
CAD (KiCad official)
- Symbol:
XC6221A332MR-G - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files:
xc6221a332mr-g-etched.step/xc6221a332mr-g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xc6221a332mr-g.step/xc6221a332mr-g.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
xc6221a332mr-g.step |
85 KB | You want the bare part, or you mark your own boards. |
xc6221a332mr-g-etched.step |
2.6 MB | You want the part with XC6221A332MR-G already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 636 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Torex Semicon datasheet (28 pp, sha256
c5bad2e786b1d143, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).