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XC6206P362MR

UMW · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

XC6206P362MR from UMW, in a SOT-23. Pinout and pin descriptions extracted from the datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / Vss reference. Common return for input and output. Tie directly to the system ground plane at the input decoupling capacitor.
2 VIN power_in Regulator input supply. Operating range 1.8V to 8V (9V abs max). Bypass with a 1µF ceramic to GND close to the pin as shown in the application circuit.
3 VOUT power_out Regulated 3.6V output (±2.5%). Delivers up to 250mA typical (500mA abs max, ~380mA current-limit). Requires a 1µF ceramic output capacitor to GND for stability.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • XC6206P362MR
  • XC6206P362MRM
  • XC6206P362MRPR
  • XC6206P362MRP

CAD (KiCad official)

  • Symbol: XC6206P362MR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (13 pp, sha256 1cee8a834cde53af, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF