Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

W25Q64JWSSIM

Winbond Elec · NOR FLASH · SOIC-8-208mil

W25Q64JWSSIM from Winbond Elec, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /CS input SPI Chip Select (active low). When high, the device is deselected and DO/IO pins are high-impedance; when low, the device is selected and instructions can be issued. Must transition high->low after power-up before any new instruction is accepted; a pull-up to VCC is recommended.
2 DO (IO1) bidirectional Serial Data Output for Standard SPI (unidirectional DO); becomes bidirectional IO1 for Dual/Quad SPI and QPI modes. Data is clocked out on the falling edge of CLK in standard SPI.
3 /WP (IO2) bidirectional Write Protect input (active low) for Standard/Dual SPI: when low with SRP0=1, blocks Status Register writes and hardware-protects the memory array per BP bits. Reassigned as bidirectional IO2 when QE bit of Status Register-2 is set for Quad I/O / QPI.
4 GND power_in Device ground reference (0 V). Connect directly to system ground plane.
5 DI (IO0) bidirectional Serial Data Input for Standard SPI (unidirectional DI); becomes bidirectional IO0 for Dual/Quad SPI and QPI modes. Instructions, addresses and data are latched on the rising edge of CLK.
6 CLK input Serial Clock input. Provides the timing for all serial input/output operations; supports up to 133 MHz Quad I/O SPI clock (equivalent 532 MHz effective data rate in Quad I/O). CMOS input referenced to VCC.
7 /HOLD or /RESET (IO3) bidirectional Multi-function pin. In Standard/Dual SPI with QE=0: acts as /HOLD (active low) to pause an active serial operation, or optionally as software-configurable /RESET (via Status Register-3 HOLD/RST bit); DO goes Hi-Z and DI/CLK are ignored while /HOLD is low. When QE=1 (Quad enabled), becomes bidirectional IO3 for Quad SPI / QPI transfers.
8 VCC power_in Power supply input. 1.7 V to 1.95 V (nominal 1.8 V). Active current ~1 mA, power-down current <0.1 uA. Decouple with a 100 nF capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer Winbond Elec
Package SOIC-8-208mil
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • W25Q64JWSSIM
  • W25Q64JWSSIMUUIM
  • W25Q64JWSSIMXGIM
  • W25Q64JWSSIMZPIM
  • W25Q64JWSSIMZEIM
  • W25Q64JWSSIMTBIM
  • W25Q64JWSSIMBY

CAD (KiCad official)

  • Symbol: W25Q64JWSSIM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: w25q64jwssim-etched.step / w25q64jwssim-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); w25q64jwssim.step / w25q64jwssim.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Winbond Elec datasheet (None pp, sha256 a469bcb06c862042, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF