VIPER12ADIP-E from STMicroelectronics, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SOURCE	power_in	Power MOSFET source and circuit ground reference. Pins 1 and 2 are internally tied together and serve as the IC ground return.
2	SOURCE	power_in	Power MOSFET source and circuit ground reference. Second SOURCE pin (paralleled with pin 1) for improved current handling and thermal dissipation.
3	FB	input	Feedback input. Useful voltage range 0 V to 1 V; sets the peak drain MOSFET current. Current limitation (maximum drain current, IDlim typ 0.4 A) is obtained by shorting FB to SOURCE. FB pin input impedance ~1.2 kΩ; IFB max 3 mA.
4	VDD	power_in	Power supply for the internal control circuits. Range 9-38 V (absolute max 50 V). Start-up threshold VDDon ~14.5 V, undervoltage shutdown VDDoff ~8 V, overvoltage threshold VDDovp ~42 V. Charged during start-up by the internal high-voltage current source from DRAIN.
5	DRAIN	power_out	Power MOSFET drain. Also used by the internal high-voltage start-up current source to charge the external VDD capacitor. Switching drain-source rating 730 V; rDS(on) typ 27 Ω. Pins 5-8 are internally connected together.
6	DRAIN	power_out	Power MOSFET drain (paralleled with pins 5, 7, 8) for improved current handling and thermal dissipation to the PCB copper.
7	DRAIN	power_out	Power MOSFET drain (paralleled with pins 5, 6, 8) for improved current handling and thermal dissipation to the PCB copper.
8	DRAIN	power_out	Power MOSFET drain (paralleled with pins 5, 6, 7) for improved current handling and thermal dissipation to the PCB copper.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	DIP-8
Category	PMIC
Pins	8

Ordering variants

Same part, different packaging or reel option.

VIPER12ADIP-E
VIPER12AS-E
VIPER12ASTR-E

CAD (KiCad official)

Symbol: VIPER12ADIP-E
Footprint: Package_DIP:DIP-8_W7.62mm
3D model: DIP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`viper12adip-e.step`	271 KB	You want the bare part, or you mark your own boards.
`viper12adip-e-etched.step`	2.0 MB	You want the part with `VIPER12ADIP-E` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 515 faces against 148 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (21 pp, sha256 7311adf78816dd66, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF