component
USBLC6-2SC6
Public Unreviewedby adom
USBLC6-2SC6 with source-traceable pin map and explicitly nominal drawing-led CAD.
← Commit history
Correct oversized SOT23 nominal geometry and preserve source evidence
30 files changed
+15255−7401
diff truncated
LICENSE-KICAD.md+1README.md+7−32build_nominal_model.py+47docs/hero.pngdocs/manufacturer-reference.pdfpackage.json+16−9page.json+76−27provenance-correction.json+37review/adom-footprint-validation.log+1review/adom-symbol-validation.log+1review/features.json+26review/generator.log+10review/hero-alignment.pngreview/hero-build.log+1review/marking.log+5review/previous-page.json+149review/publish.json+17review/rejected-generic.step+2417review/render-convert.log+4review/render-features.log+3review/render-thumbnail-underside.log+4review/render-thumbnail.log+4review/underside.pngreview/upstream-before-publish.json+14usblc6-2sc6-ai-nominal.step+5396usblc6-2sc6-etched.check.json+85usblc6-2sc6-etched.check.pngusblc6-2sc6-etched.glbusblc6-2sc6-etched.mark-plan.json+142usblc6-2sc6-etched.step+6792−7333LICENSE-KICAD.mdadded+1@@ -0,0 +1 @@+KiCad-derived symbol/footprint: CC-BY-SA-4.0 with KiCad library exception, https://www.kicad.org/libraries/license/ . Original Adom nominal models: CC-BY-SA-4.0. Manufacturer documents retain their copyright.
README.md+7−32@@ -1,8 +1,6 @@ # USBLC6-2SC6 -**STMicroelectronics** · USB ESD protection array · SOT-23-6--Very-low-capacitance (3.5 pF max) ESD protection array dedicated to two high-speed data lines such as USB 2.0, in a SOT-23-6 package. Each I/O pair steers ESD strikes through internal diodes to GND or the VBUS rail, clamping the transient while adding little capacitance so signal integrity holds at USB speeds. IEC 61000-4-2 level 4 rated. Place it right at the connector across D+/D- with VBUS to the 5 V rail. The default USB port protector.+STMicroelectronics · 6-pin SOT-23. ## Pinout @@ -15,38 +13,15 @@ Very-low-capacitance (3.5 pF max) ESD protection array dedicated to two high-spe | 5 | VBUS | power_in | Positive supply rail reference for the ESD clamp (typ +5 V for USB). Provides the upper rail for the steering diodes and is clamped to GND through the internal Zener; VBR = 6 V min at IF = 1 mA. Bypass to GND with a 100 nF capacitor placed close to the device for optimal ESD performance. | | 6 | I/O1 | passive | Second bond pad for the I/O1 data line; internally shorted to pin 1. Route the data line to either pin 1 or 6 (or both) as convenient for the PCB layout. | -## Key specifications--| Parameter | Value |-|---|---|-| Type | USB ESD protection array (2 lines) |-| Line capacitance | 3.5 pF max (very low) |-| ESD rating | IEC 61000-4-2 level 4 (device level) |-| Leakage | 150 nA max |-| Protected lines | 2 (I/O1, I/O2) |-| Rail | VBUS clamp reference |-| Package | SOT-23-6 |-| Body (L×W×H) | 2.9 × 1.6 × 1.1 mm |--## Ordering variants--Same part, different packaging or reel option.--- `USBLC6-2SC6 (SOT-23-6, tape & reel)` -## CAD (KiCad official)+## Model correction and provenance -- Symbol: `Power_Protection:USBLC6-2SC6`-- Footprint: `Package_TO_SOT_SMD:SOT-23-6`-- 3D model: SOT-23-6 (KiCad packages3D)-- 3D model files: `usblc6-2sc6-etched.step` / `usblc6-2sc6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `usblc6-2sc6.step` / `usblc6-2sc6.glb` are the bare package body.+Original Adom nominal model from the manufacturer package dimensions: 2.9 ×1.6 mm body,2.8 mm lead span,0.95 mm pitch and1.20 mm height. The previous generic1.55 mm model exceeded ST's1.45 mm maximum. This is drawing-led CAD, not a manufacturer STEP or a tolerance envelope. Mold taper, lead bends and materials are illustrative. -## Provenance+The marked variant adds a0.005 mm virtual full-MPN identification layer. It does not reproduce factory markings or physical etching. Board-use models omit the hero's nonphysical footprint/signal annotations. -Data extracted from the manufacturer datasheet, not a distributor listing:+The existing KiCad-derived symbol and footprint retain the library license exception. The footprint remains a generic variant; manufacturer land recommendations and process qualification require separate review. -- **Datasheet:** [STMicroelectronics datasheet](http://www.stm32circle.com/resources/Datasheets/USBLC6-2SC6.PDF) (11 pp, sha256 `e593275721905c80`, retrieved 2026-08-17, tier: cse)-- **Extractor:** `ds2sf` (Claude) — every pin and dimension is cited to a datasheet page; refuses to fabricate.-- **CAD:** KiCad official libraries (CC-BY-SA 4.0).+See [provenance](provenance-correction.json), [reference PDF](docs/manufacturer-reference.pdf), and [manufacturer source](https://www.st.com/resource/en/datasheet/usblc6-2.pdf). Reference review: Mirror older revision; dimensions independently checked against ST DS4260 Rev7 Dec2021 Table3 page12. -[Datasheet PDF](docs/usblc6-2sc6-datasheet.pdf)+Local model review, native file validation, published wiki visual review and physical qualification are distinct.
build_nominal_model.pyadded+47@@ -0,0 +1,47 @@+"""Original nominal ST SOT23 envelope; shared OCP kernel, not vendor CAD.+Mold taper and polygonal lead bends are illustrative nominal geometry.+"""+import sys+from pathlib import Path+from OCP.gp import gp_Pnt,gp_Vec+from OCP.BRepBuilderAPI import BRepBuilderAPI_MakePolygon,BRepBuilderAPI_MakeFace+from OCP.BRepOffsetAPI import BRepOffsetAPI_ThruSections+from OCP.BRepPrimAPI import BRepPrimAPI_MakePrism,BRepPrimAPI_MakeBox+from OCP.BRepAlgoAPI import BRepAlgoAPI_Cut+from OCP.TopoDS import TopoDS_Compound+from OCP.BRep import BRep_Builder+from OCP.TopLoc import TopLoc_Location+from OCP.TDocStd import TDocStd_Document+from OCP.TCollection import TCollection_ExtendedString+from OCP.XCAFDoc import XCAFDoc_DocumentTool,XCAFDoc_ColorType+from OCP.TDataStd import TDataStd_Name+from OCP.Quantity import Quantity_Color,Quantity_TOC_RGB+from OCP.STEPCAFControl import STEPCAFControl_Writer+from OCP.STEPControl import STEPControl_AsIs+from OCP.IFSelect import IFSelect_RetDone+out=Path(sys.argv[1]);out.mkdir(parents=True,exist_ok=True)+def wire(points):+ p=BRepBuilderAPI_MakePolygon()+ for xyz in points:p.Add(gp_Pnt(*xyz))+ p.Close();return p.Wire()+# Cut taper wedges from a box; keep the top's analytic +Z plane for metadata.+body=BRepPrimAPI_MakeBox(gp_Pnt(-.8,-1.45,.1),1.6,2.9,1.1).Shape()+for axis,outer,inner,span in [('x',.8,.725,4.0),('y',1.45,1.375,3.0)]:+ for side in [-1,1]:+ for triangle in [[(inner,.1),(outer,.1),(outer,.6)],[(outer,.6),(outer,1.2),(inner,1.2)]]:+ points=[(side*v,-span/2,z) if axis=='x' else (-span/2,side*v,z) for v,z in triangle]+ face=BRepBuilderAPI_MakeFace(wire(points)).Face()+ cut=BRepPrimAPI_MakePrism(face,gp_Vec(0,span,0) if axis=='x' else gp_Vec(span,0,0)).Shape()+ body=BRepAlgoAPI_Cut(body,cut).Shape()+parts=[('MoldedBody_AI_Nominal',body,(.07,.075,.08))]+profile=[(.72,.525),(.90,.525),(1.10,0),(1.40,0),(1.40,.15),(1.15,.15),(1.00,.675),(.72,.675)]+for n,side,y in [(1,-1,.95),(2,-1,0),(3,-1,-.95),(4,1,-.95),(5,1,0),(6,1,.95)]:+ face=BRepBuilderAPI_MakeFace(wire([(side*x,y-.2,z) for x,z in profile])).Face();shape=BRepPrimAPI_MakePrism(face,gp_Vec(0,.4,0)).Shape();parts.append((f'Lead{n}',shape,(.72,.73,.75)))+doc=TDocStd_Document(TCollection_ExtendedString('BinXCAF'));st=XCAFDoc_DocumentTool.ShapeTool_s(doc.Main());ct=XCAFDoc_DocumentTool.ColorTool_s(doc.Main())+compound=TopoDS_Compound();builder=BRep_Builder();builder.MakeCompound(compound)+assembly=st.AddShape(compound,True);TDataStd_Name.Set_s(assembly,TCollection_ExtendedString('USBLC6-2SC6_AI_Nominal_ST_SOT23'))+for name,shape,color in parts:+ label=st.AddShape(shape,False);TDataStd_Name.Set_s(label,TCollection_ExtendedString(name));ct.SetColor(label,Quantity_Color(*color,Quantity_TOC_RGB),XCAFDoc_ColorType.XCAFDoc_ColorGen);st.AddComponent(assembly,label,TopLoc_Location())+st.UpdateAssemblies();writer=STEPCAFControl_Writer();writer.SetColorMode(True);writer.SetNameMode(True);writer.Transfer(doc,STEPControl_AsIs)+assert writer.Write(str(out/'usblc6-2sc6-ai-nominal.step'))==IFSelect_RetDone+print('WROTE',out/'usblc6-2sc6-ai-nominal.step')
docs/hero.png⋯ 1 unchanged line ⋯
docs/manufacturer-reference.pdfadded⋯ 1 unchanged line ⋯
package.json+16−9@@ -1,6 +1,6 @@ { "slug": "usblc6-2sc6",- "version": "0.1.0",+ "version": "1.0.1", "type": "component", "description": "ST very-low-capacitance ESD protection for 2 data lines, SOT-23-6. 3.5 pF, IEC level 4. Datasheet-verified.", "tags": [@@ -17,14 +17,21 @@ "path": "docs/hero.png" }, "files": [- "page.json",+ "LICENSE-KICAD.md", "README.md",- "usblc6-2sc6.kicad_sym",- "usblc6-2sc6.kicad_mod",- "usblc6-2sc6.glb",+ "build_nominal_model.py", "docs/hero.png",+ "docs/manufacturer-reference.pdf", "docs/usblc6-2sc6-datasheet.pdf",- "viewers/symbol.html",- "viewers/footprint.html"- ]-}+ "page.json",+ "provenance-correction.json",+ "review/features.json",+ "usblc6-2sc6*",+ "usblc6-2sc6.glb",+ "usblc6-2sc6.kicad_mod",+ "usblc6-2sc6.kicad_sym",+ "viewers/footprint.html",+ "viewers/symbol.html"+ ],+ "license": "CC-BY-SA-4.0"+}
page.json+76−27@@ -3,8 +3,8 @@ "type": "component", "slug": "usblc6-2sc6", "title": "USBLC6-2SC6",- "brief": "ST very-low-capacitance ESD protection for 2 data lines, SOT-23-6. 3.5 pF, IEC level 4. Datasheet-verified.",- "version": "0.1.0",+ "brief": "USBLC6-2SC6 with source-traceable pin map and explicitly nominal drawing-led CAD.",+ "version": "1.0.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -25,11 +25,12 @@ "parts": { "symbol": "usblc6-2sc6.kicad_sym", "footprint": "usblc6-2sc6.kicad_mod",- "model_3d": "usblc6-2sc6-etched.glb",- "model_3d_plain": "usblc6-2sc6.glb",+ "model_3d": "usblc6-2sc6-hero.glb",+ "model_3d_plain": "usblc6-2sc6-etched.glb", "model_3d_step": "usblc6-2sc6-etched.step", "model_3d_step_plain": "usblc6-2sc6.step",- "lbr": "usblc6-2sc6.lbr"+ "lbr": "usblc6-2sc6.lbr",+ "model_3d_unmarked": "usblc6-2sc6.glb" }, "distributor_links": {}, "pins": [@@ -71,25 +72,67 @@ } ], "provenance": {- "extractor": "ds2sf",+ "record": "provenance-correction.json",+ "cad": "Original Adom nominal reconstruction, not manufacturer CAD", "datasheet": {- "url": "http://www.stm32circle.com/resources/Datasheets/USBLC6-2SC6.PDF",- "pages": 11,- "sha256": "e593275721905c80",- "source_tier": "cse"+ "url": "https://www.st.com/resource/en/datasheet/usblc6-2.pdf",+ "mirrorSha256": "e593275721905c80a9ab47ec794d4148dcd986875d678289a56427c10a6dde42" },- "cad": "KiCad official (CC-BY-SA 4.0)",- "pins": {- "total": 6,- "described": 6,- "cites_pages": true,- "refuses_to_fabricate": true+ "historical": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "http://www.stm32circle.com/resources/Datasheets/USBLC6-2SC6.PDF",+ "pages": 11,+ "sha256": "e593275721905c80",+ "source_tier": "cse"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ } } }, "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "usblc6-2sc6.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "extents_mm": [+ 2.8,+ 2.9,+ 1.2+ ],+ "zmin_mm": 0,+ "origin": "pad-pattern centre",+ "sha256": "1736d31ce6a0b9acad47fc869b3346a04eaf715237ba2af3337c48c4dfbbf605",+ "checked_by": "Original generator and shared STEP features; nominal model",+ "source": "provenance-correction.json"+ },+ {+ "file": "usblc6-2sc6-etched.step",+ "role": "marked",+ "up": "Z",+ "units": "mm",+ "extents_mm": [+ 2.8,+ 2.9,+ 1.205+ ],+ "zmin_mm": 0,+ "origin": "pad-pattern centre",+ "sha256": "3b2db46d9a1c1b4f8fde1178a8dc52a3266c5f40810c32fdb6f9c199d6415763",+ "checked_by": "Original generator and shared STEP features; nominal model",+ "source": "provenance-correction.json"+ }+ ] }, "metadata": { "specs": {@@ -116,7 +159,7 @@ "tvs diode array usb", "low capacitance esd" ],- "discovery_pitch": "ST USBLC6-2SC6 very-low-capacitance USB ESD protection array (SOT-23-6) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",+ "discovery_pitch": "USBLC6-2SC6 with source-traceable pin map and explicitly nominal drawing-led CAD.", "author": { "name": "Ray", "email": "[email protected]"@@ -127,18 +170,24 @@ "path": "docs/hero.png" }, "files": [- "page.json",+ "LICENSE-KICAD.md", "README.md",- "usblc6-2sc6.kicad_sym",- "usblc6-2sc6.kicad_mod",- "usblc6-2sc6.glb",- "usblc6-2sc6.step",- "usblc6-2sc6.lbr",+ "build_nominal_model.py", "docs/hero.png",+ "docs/manufacturer-reference.pdf", "docs/usblc6-2sc6-datasheet.pdf",- "viewers/symbol.html",+ "page.json",+ "provenance-correction.json",+ "review/features.json",+ "usblc6-2sc6*",+ "usblc6-2sc6.glb",+ "usblc6-2sc6.kicad_mod",+ "usblc6-2sc6.kicad_sym", "viewers/footprint.html",- "usblc6-2sc6-etched.step"+ "viewers/symbol.html",+ "usblc6-2sc6-hero.glb",+ "usblc6-2sc6-hero.overlay.json",+ "usblc6-2sc6-etched.glb" ], "variants": [ {@@ -146,4 +195,4 @@ "kind": "packaging" } ]-}+}
provenance-correction.jsonadded+37@@ -0,0 +1,37 @@+{+ "mpn": "USBLC6-2SC6",+ "date": "2026-10-11",+ "manufacturerSource": "https://www.st.com/resource/en/datasheet/usblc6-2.pdf",+ "documentReview": "Mirror older revision; dimensions independently checked against ST DS4260 Rev7 Dec2021 Table3 page12",+ "datasheetMirrorFile": "docs/manufacturer-reference.pdf",+ "datasheetSha256": "e593275721905c80a9ab47ec794d4148dcd986875d678289a56427c10a6dde42",+ "correction": "Generic1.55mm body exceeds ST1.45mm max; replaced original drawing-led nominal model",+ "geometry": {+ "bodyLengthMm": 2.9,+ "bodyWidthMm": 1.6,+ "leadSpanMm": 2.8,+ "pitchMm": 0.95,+ "packageHeightMm": 1.2,+ "leadCount": 6,+ "markLiftMm": 0.005,+ "pin1": "STEP negativeX positiveY corresponds KiCad negativeX negativeY"+ },+ "authorship": "Original Adom nominal reconstruction, not manufacturer CAD",+ "limits": [+ "Mold taper, polygonal lead bends and colors illustrative",+ "No physical sample or tolerance-envelope qualification",+ "Virtual full MPN is identification, not factory top mark",+ "Generic KiCad footprint variant retained; native process qualification separate"+ ],+ "license": "CC-BY-SA-4.0 for new model; original KiCad-derived symbol/footprint retain library exception",+ "oldModels": [],+ "visualReview": "Top marking, oblique and underside renders inspected; nominal body and five/six leads match intended topology. Hero alignment zero offset. Live wiki review remains pending.",+ "assetSha256": {+ "usblc6-2sc6.step": "1736d31ce6a0b9acad47fc869b3346a04eaf715237ba2af3337c48c4dfbbf605",+ "usblc6-2sc6-ai-nominal.step": "1736d31ce6a0b9acad47fc869b3346a04eaf715237ba2af3337c48c4dfbbf605",+ "usblc6-2sc6-etched.step": "3b2db46d9a1c1b4f8fde1178a8dc52a3266c5f40810c32fdb6f9c199d6415763",+ "usblc6-2sc6.glb": "4d0ba2caac5105ac5bd8be06a2f66d5fd96a37c9d57e3e5405810edcac0899d2",+ "usblc6-2sc6-hero.glb": "aaf814919e3961c63b67a8040528097995c805a3da31f36836bfbc28f10d3714",+ "usblc6-2sc6-etched.glb": "a5fc32d2a7b290db1800a5583cf49e35be6478e1a4f54af5c8953398dac83624"+ }+}
review/adom-footprint-validation.logadded+1@@ -0,0 +1 @@+OK: interactive embed (6 pads) → /home/adom/project/load-st-catalog-repairs/usblc6-2sc6/viewers/footprint.html
review/adom-symbol-validation.logadded+1@@ -0,0 +1 @@+OK: interactive embed (6 pins) → /home/adom/project/load-st-catalog-repairs/usblc6-2sc6/viewers/symbol.html
review/features.jsonadded+26@@ -0,0 +1,26 @@+{+ "extracted_by": "service-step2glb 0.2.0",+ "extracted_at": "2026-10-11T17:45:55Z",+ "bbox_mm": {+ "x": [+ -1.4,+ 1.4+ ],+ "y": [+ -1.45,+ 1.45+ ],+ "z": [+ -0.0,+ 1.205+ ]+ },+ "floor_z_mm": -0.0,+ "top_z_mm": 1.205,+ "longest_axis": "y",+ "pin1": {+ "source": "unknown"+ },+ "duration_ms": 1647,+ "warnings": []+}
review/generator.logadded+10@@ -0,0 +1,10 @@+[32;1m+*******************************************************************+****** Statistics on Transfer (Write) ******[0m+[32;1m+*******************************************************************+****** Transfer Mode = 0 I.E. As Is ******[0m+[32;1m****** Transferring Shape, ShapeType = 0 ******[0m+[32;1m** WorkSession : Sending all data[0m+[32;1m Step File Name : /tmp/load-usblc6-2sc6-nominal/usblc6-2sc6-ai-nominal.step(4635 ents) Write Done[0m+WROTE /tmp/load-usblc6-2sc6-nominal/usblc6-2sc6-ai-nominal.step
review/hero-alignment.pngadded⋯ 1 unchanged line ⋯
review/hero-build.logadded+1@@ -0,0 +1 @@+OK /home/adom/project/load-st-catalog-repairs/usblc6-2sc6/usblc6-2sc6-hero.glb: pads 6, silk items 7, pin1 footprint silkscreen, labels 6; align OK (offset 0.0 mm)
review/marking.logadded+5@@ -0,0 +1,5 @@+{"ok": true, "out": "/home/adom/project/load-st-catalog-repairs/usblc6-2sc6/usblc6-2sc6-etched.step", "plan": "usblc6-2sc6-etched.mark-plan.json", "summary": "Mark along the 2.75 mm axis (-Y), 0.44 mm text (2 lines), upright with pin 1 left lower, outline rot 90 after a 180 deg pose turn; ~29 px caps at 320 px", "etch": {"out": "/home/adom/project/load-st-catalog-repairs/usblc6-2sc6/usblc6-2sc6-etched.step", "mpn": "USBLC6-2SC6", "lines": ["USBLC", "6-2SC6"], "removedOldMarks": [], "turns": [{"axis": "z", "quarterTurns": 1}], "serviceMarkTurnedQuarter": 0, "line2Scaled": true, "fit": {"scale": 0.7983, "capMm": 0.4377, "markMm": [2.059, 1.015], "bandMm": [2.75, 1.45], "zMm": 1.205}}, "check": {"status": "PASS", "report": "usblc6-2sc6-etched.check.json", "image": "usblc6-2sc6-etched.check.png"}}+OK: external command completed; its running time is in this session+Hint: Use exec for build, browser automation and other work outside AI Flow. Do not start an idle heartbeat; only actual work counts.+Hint: Mark along 2.75 mm axis, 0.44 mm text, upright with pin 1 left lower: PASS+Hint: PASS. Look at usblc6-2sc6-etched.check.png (top view) and at the outline at widget size before you report.
review/previous-page.jsonadded+149@@ -0,0 +1,149 @@+{+ "schema_version": 1,+ "type": "component",+ "slug": "usblc6-2sc6",+ "title": "USBLC6-2SC6",+ "brief": "ST very-low-capacitance ESD protection for 2 data lines, SOT-23-6. 3.5 pF, IEC level 4. Datasheet-verified.",+ "version": "0.1.0",+ "license": "CC-BY-SA-4.0",+ "tags": [+ "component",+ "esd-protection",+ "tvs",+ "usb",+ "sot-23-6",+ "stmicroelectronics"+ ],+ "component": {+ "mpn": "USBLC6-2SC6",+ "manufacturer": "STMicroelectronics",+ "package": "SOT-23-6",+ "pin_count": 6,+ "category": "Circuit Protection",+ "subcategory": "USB ESD protection array",+ "datasheet": "http://www.stm32circle.com/resources/Datasheets/USBLC6-2SC6.PDF",+ "parts": {+ "symbol": "usblc6-2sc6.kicad_sym",+ "footprint": "usblc6-2sc6.kicad_mod",+ "model_3d": "usblc6-2sc6-etched.glb",+ "model_3d_plain": "usblc6-2sc6.glb",+ "model_3d_step": "usblc6-2sc6-etched.step",+ "model_3d_step_plain": "usblc6-2sc6.step",+ "lbr": "usblc6-2sc6.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "I/O1",+ "type": "passive",+ "description": "Protected data line 1 (e.g. USB D+ or D-). Bidirectional signal pin clamped by steering diodes to GND and VBUS; also tied to pin 6 (same net). Typical capacitance to GND 2.5 pF, max 3.5 pF at 1 MHz."+ },+ {+ "number": "2",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference. Cathode return for the lower steering diodes and anode of the internal clamping Zener; must be connected to system ground with the shortest possible trace to minimize parasitic inductance during an ESD event."+ },+ {+ "number": "3",+ "name": "I/O2",+ "type": "passive",+ "description": "Protected data line 2 (e.g. USB D- or D+). Bidirectional signal pin clamped by steering diodes to GND and VBUS; also tied to pin 4 (same net). Typical capacitance to GND 2.5 pF, max 3.5 pF at 1 MHz."+ },+ {+ "number": "4",+ "name": "I/O2",+ "type": "passive",+ "description": "Second bond pad for the I/O2 data line; internally shorted to pin 3. Route the data line to either pin 3 or 4 (or both) as convenient for the PCB layout."+ },+ {+ "number": "5",+ "name": "VBUS",+ "type": "power_in",+ "description": "Positive supply rail reference for the ESD clamp (typ +5 V for USB). Provides the upper rail for the steering diodes and is clamped to GND through the internal Zener; VBR = 6 V min at IF = 1 mA. Bypass to GND with a 100 nF capacitor placed close to the device for optimal ESD performance."+ },+ {+ "number": "6",+ "name": "I/O1",+ "type": "passive",+ "description": "Second bond pad for the I/O1 data line; internally shorted to pin 1. Route the data line to either pin 1 or 6 (or both) as convenient for the PCB layout."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "http://www.stm32circle.com/resources/Datasheets/USBLC6-2SC6.PDF",+ "pages": 11,+ "sha256": "e593275721905c80",+ "source_tier": "cse"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Type": "USB ESD protection array (2 lines)",+ "Line capacitance": "3.5 pF max (very low)",+ "ESD rating": "IEC 61000-4-2 level 4 (device level)",+ "Leakage": "150 nA max",+ "Protected lines": "2 (I/O1, I/O2)",+ "Rail": "VBUS clamp reference",+ "Package": "SOT-23-6",+ "Body (L×W×H)": "2.9 × 1.6 × 1.1 mm"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "usblc6-2sc6",+ "usb esd protection",+ "tvs diode array usb",+ "low capacitance esd"+ ],+ "discovery_pitch": "ST USBLC6-2SC6 very-low-capacitance USB ESD protection array (SOT-23-6) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ },+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "usblc6-2sc6.kicad_sym",+ "usblc6-2sc6.kicad_mod",+ "usblc6-2sc6.glb",+ "usblc6-2sc6.step",+ "usblc6-2sc6.lbr",+ "docs/hero.png",+ "docs/usblc6-2sc6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "usblc6-2sc6-etched.step"+ ],+ "variants": [+ {+ "mpn": "USBLC6-2SC6 (SOT-23-6, tape & reel)",+ "kind": "packaging"+ }+ ]+}
review/publish.jsonadded+17@@ -0,0 +1,17 @@+{+ "status": "error",+ "data": {+ "http_status": 400,+ "response": {+ "error": "Unknown org: ray",+ "request_id": "4d7114af-3684-4b61-9f57-6a799d370891"+ }+ },+ "hints": [+ {+ "level": "error",+ "code": "REQUEST_REJECTED",+ "message": "Unknown org: ray"+ }+ ]+}
review/rejected-generic.stepadded+2417@@ -0,0 +1,2417 @@+ISO-10303-21;+HEADER;+/* SOT-23-6.step 3D STEP model for use in ECAD systems+ * Copyright (C) 2025, KiCAD+ *+ * This work is licensed under the+ * [Creative Commons CC-BY-SA 4.0 License](https://creativecommons.org/licenses/by-sa/4.0/legalcode),+ * with the following exception:+ *+ * To the extent that the creation of electronic designs that use 'Licensed Material' can be+ * considered to be 'Adapted Material', then the copyright holder waives article 3 of the license+ * with respect to these designs and any generated files which use data provided as part of the+ * 'Licensed Material'.+ *+ * You are free to use the library data in your own projects without the obligation to share your+ * project files under this or any other license agreement. However, if you wish to distribute+ * these libraries, or parts thereof (including in modified form) as a collection then the exception+ * above does not apply. Please refer to+ * https://gitlab.com/kicad/libraries/kicad-packages3D/-/blob/master/LICENSE.md for further clarification+ * of the exception.+ *+ * Disclaimer of Warranties and Limitation of Liability.+ * These libraries are provided in the hope that they will be useful, but are provided without warranty of any kind, express or implied.+ * USE 3D CAD DATA AT YOUR OWN RISK+ * DO NOT RELY UPON ANY INFORMATION FOUND HERE WITHOUT INDEPENDENT VERIFICATION.+ */++FILE_DESCRIPTION(+/* description */ ('model of SOT-23-6'),+/* implementation_level */ '2;1');++FILE_NAME(+/* name */ 'SOT-23-6.step',+/* time_stamp */ '1970-01-01T00:00:00',+/* author */ ('KiCAD','kicad'),+/* organization */ ('OCCT'),+/* preprocessor_version */ '',+/* originating_system */ 'KiCAD',+/* authorisation */ '');++FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));+ENDSEC;++DATA;+#1=APPLICATION_PROTOCOL_DEFINITION('international standard','automotive_design',2000,#2);+#2=APPLICATION_CONTEXT('core data for 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review/render-convert.logadded+4@@ -0,0 +1,4 @@+OK: GLB written from usblc6-2sc6-etched.step → usblc6-2sc6-etched.glb (8 meshes, 3 materials, 32.7 KB, 209 ms)+{"ok":true,"output":"usblc6-2sc6-etched.glb","sizeBytes":33480,"meshes":8,"nodes":11,"materials":[{"name":"mat_0","baseColor":[0.07000000029802322,0.07500000298023224,0.07999999821186066,1.0],"metal":null,"roughness":null},{"name":"mat_1","baseColor":[0.7200000286102295,0.7300000190734863,0.75,1.0],"metal":null,"roughness":null},{"name":"mat_2","baseColor":[0.7799999713897705,0.7799999713897705,0.7599999904632568,1.0],"metal":null,"roughness":null}],"durationMs":209}+Large file queued for async conversion (job 40859e23c5b8e9e8). Polling...+Job 40859e23c5b8e9e8 complete (1s). Downloading GLB...
review/render-features.logadded+3@@ -0,0 +1,3 @@+OK: features written → review/features.json+bbox x=-1.4..1.4 y=-1.45..1.45 z=-0.0..1.205 floor_z=-0.0 axis=y pin1=unknown+Feature extraction queued (job a50b3a21edeac28f). Polling...
review/render-thumbnail-underside.logadded+4@@ -0,0 +1,4 @@+OK: PNG written from usblc6-2sc6-etched.step (step) → review/underside.png (1000×700 iso pose, 13.4 KB, 608 ms)+bbox 2.80×2.90×1.21 mm pose=iso src=step+{"ok":true,"output":"review/underside.png","sizeBytes":13679,"width":1000,"height":700,"pose":"iso","srcKind":"step","bboxMm":[[-1.4000001,1.4000001],[-1.4500001000000309,1.4500001000000002],[-1e-7,1.2050001]],"durationMs":608}+Thumbnail queued (job 35f6c0c4724d058d). Polling...
review/render-thumbnail.logadded+4@@ -0,0 +1,4 @@+OK: PNG written from usblc6-2sc6-etched.step (step) → docs/hero.png (1600×1000 iso2 pose, 25.5 KB, 1144 ms)+bbox 2.80×2.90×1.21 mm pose=iso2 src=step+{"ok":true,"output":"docs/hero.png","sizeBytes":26072,"width":1600,"height":1000,"pose":"iso2","srcKind":"step","bboxMm":[[-1.4000001,1.4000001],[-1.4500001000000309,1.4500001000000002],[-1e-7,1.2050001]],"durationMs":1144}+Thumbnail queued (job a5619db586a0886f). Polling...
review/underside.pngadded⋯ 1 unchanged line ⋯
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usblc6-2sc6-etched.check.jsonadded+85@@ -0,0 +1,85 @@+{+ "schema": "adom/mark-check@1",+ "step": "/home/adom/project/load-st-catalog-repairs/usblc6-2sc6/usblc6-2sc6-etched.step",+ "mpn": "USBLC6-2SC6",+ "status": "PASS",+ "checks": [+ {+ "check": "axis",+ "status": "PASS",+ "detail": "text along the 2.75 mm axis",+ "angleDeg": 0+ },+ {+ "check": "upright",+ "status": "PASS",+ "detail": "upright, left to right, pin 1 left lower"+ },+ {+ "check": "size",+ "status": "PASS",+ "detail": "text height 0.438 mm, 99% of what fits (0.441 mm), block fills 69% of the 1.45 mm band height",+ "capMm": 0.4377,+ "fitMm": 0.4409+ },+ {+ "check": "band",+ "status": "PASS",+ "detail": "inside the usable band"+ },+ {+ "check": "flat",+ "status": "PASS",+ "detail": "flat, coplanar with the face (+5 um)"+ },+ {+ "check": "group",+ "status": "PASS",+ "detail": "Adom.LaserEtch group"+ },+ {+ "check": "colour",+ "status": "PASS",+ "detail": "light mark (sRGB 0.90, 0.90, 0.89)",+ "rgb": [+ 0.896243869286,+ 0.896243869286,+ 0.886003966688+ ]+ },+ {+ "check": "widget",+ "status": "PASS",+ "detail": "28.5 px caps with the outline 320 px wide",+ "capHeightPx320": 28.5+ }+ ],+ "plan": {+ "summary": "Mark along the 2.75 mm axis (-Y), 0.44 mm text (2 lines), upright with pin 1 left lower, outline rot 90 after a 180 deg pose turn; ~29 px caps at 320 px",+ "band": [+ -0.725,+ -1.375,+ 0.725,+ 1.375+ ],+ "readingDirection": [+ -0.0,+ -1.0,+ 0.0+ ],+ "lines": [+ "USBLC",+ "6-2SC6"+ ]+ },+ "thresholds": {+ "sizePass": 0.8,+ "sizeFail": 0.6,+ "widgetPxPass": 6.0,+ "widgetPxFail": 4.0,+ "outlineOffsetMax": 0.15,+ "coplanarMaxMm": 0.02+ },+ "image": "usblc6-2sc6-etched.check.png",+ "reportPath": "usblc6-2sc6-etched.check.json"+}
usblc6-2sc6-etched.check.pngadded⋯ 1 unchanged line ⋯
usblc6-2sc6-etched.glb⋯ 1 unchanged line ⋯
usblc6-2sc6-etched.mark-plan.jsonadded+142@@ -0,0 +1,142 @@+{+ "plan": {+ "schema": "adom/mark-plan@1",+ "mpn": "USBLC6-2SC6",+ "step": "/home/adom/project/load-st-catalog-repairs/usblc6-2sc6/usblc6-2sc6.step",+ "footprint": "/home/adom/project/load-st-catalog-repairs/usblc6-2sc6/usblc6-2sc6.kicad_mod",+ "standUp": [],+ "standUpSource": "as-is (Z up)",+ "face": "top",+ "pin1": {+ "source": "footprint pad 1",+ "xyMm": [+ -1.1375,+ 0.95+ ],+ "corner": "left/lower"+ },+ "existingMarks": [],+ "vendorMarking": {+ "present": false,+ "glyphFaces": 0+ },+ "faceNormal": [+ 0,+ 0,+ 1+ ],+ "longAxis": {+ "axis": "y",+ "vector": [+ 0.0,+ 1.0,+ 0.0+ ],+ "why": "longest usable top dimension (2.75 mm vs 1.45 mm)",+ "override": null+ },+ "readingDirection": {+ "vector": [+ -0.0,+ -1.0,+ 0.0+ ],+ "angleDeg": 270,+ "textUp": [+ 1.0,+ -0.0,+ 0.0+ ],+ "rule": "pin 1 / pad 1 at the start (left) of the text, and below it when it sits on a side"+ },+ "band": {+ "regionMm": [+ -0.725,+ -1.375,+ 0.725,+ 1.375+ ],+ "zMm": 1.2,+ "lengthMm": 2.75,+ "heightMm": 1.45,+ "why": "highest flat face over the body centre",+ "terminationsExcludedBy": null,+ "trimmedEnds": [],+ "keepouts": [],+ "sideTurn": null,+ "margins": {+ "lengthEachSide": 0.12,+ "heightEachSide": 0.15+ }+ },+ "text": {+ "lines": [+ "USBLC",+ "6-2SC6"+ ],+ "chars": 11,+ "capHeightMm": 0.4409,+ "smallestLineMm": 0.4409,+ "heightPctOfBand": 69.9,+ "why": "two lines: the smaller line (0.441 mm) beats one line (0.236 mm) by 1.86x",+ "alternative": {+ "lines": [+ "USBLC6-2SC6"+ ],+ "capHeightMm": 0.2364,+ "smallestLineMm": 0.2364+ },+ "font": "service-step2glb /laser-etch (single-stroke outline font)"+ },+ "etch": {+ "poseQuarterTurnsZ": 1,+ "service": "/laser-etch?mode=flat",+ "note": "turn so the reading direction is +X, etch, fit the mark into the band, turn back"+ },+ "outline": {+ "upAxis": "z",+ "poseRotZDeg": 180,+ "rot": 90,+ "recipe": "adom-aiflow-etch outline <part.step> --footprint <part.kicad_mod> --mpn USBLC6-2SC6 (stands the STEP up (as-is (Z up)), turns it 180 deg about Z and draws USBLC / 6-2SC6 on the planned band, rot 90)",+ "why": "iso camera looks from +X+Y+Z: text along +Y (rot 90) or -X (rot 180) reads left to right with pin 1 toward the viewer"+ },+ "widget": {+ "px": 320,+ "pxPerMm": 79.86,+ "capHeightPx": 28.7+ },+ "hints": [],+ "warnings": [],+ "summary": "Mark along the 2.75 mm axis (-Y), 0.44 mm text (2 lines), upright with pin 1 left lower, outline rot 90 after a 180 deg pose turn; ~29 px caps at 320 px"+ },+ "etch": {+ "out": "/home/adom/project/load-st-catalog-repairs/usblc6-2sc6/usblc6-2sc6-etched.step",+ "mpn": "USBLC6-2SC6",+ "lines": [+ "USBLC",+ "6-2SC6"+ ],+ "removedOldMarks": [],+ "turns": [+ {+ "axis": "z",+ "quarterTurns": 1+ }+ ],+ "serviceMarkTurnedQuarter": 0,+ "line2Scaled": true,+ "fit": {+ "scale": 0.7983,+ "capMm": 0.4377,+ "markMm": [+ 2.059,+ 1.015+ ],+ "bandMm": [+ 2.75,+ 1.45+ ],+ "zMm": 1.205+ }+ }+}
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