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USB3343-CP-TR

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Microchip Tech USB Converters, QFN-24-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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USB3343-CP-TR

Microchip Tech · USB Converters · QFN-24-EP(4x4)

USB3343-CP-TR from Microchip Tech, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR output ULPI bus direction control (CMOS output). Driven high by the PHY to take ownership of the bus when transferring data to the Link; driven low when monitoring the bus for commands from the Link.
2 CLKOUT output ULPI clock (CMOS). In ULPI Clock Output Mode, drives the 60MHz ULPI clock synchronous to all ULPI signals. In ULPI Clock Input Mode, tie to VDDIO to configure the device for 60MHz ULPI clock input on REFCLK.
3 NXT output ULPI 'next' handshake (CMOS, active high). Asserted by the PHY to throttle data; when the Link is sending data, NXT indicates the current byte has been accepted by the PHY.
4 DATA0 bidirectional ULPI bi-directional data bus, bit 0 (LSB). CMOS I/O.
5 DATA1 bidirectional ULPI bi-directional data bus, bit 1. CMOS I/O.
6 DATA2 bidirectional ULPI bi-directional data bus, bit 2. CMOS I/O.
7 DATA3 bidirectional ULPI bi-directional data bus, bit 3. CMOS I/O.
8 DATA4 bidirectional ULPI bi-directional data bus, bit 4. CMOS I/O.
9 VDDIO power_in ULPI interface supply voltage (1.8V to 3.3V typical). When RESETB is low and VDDIO is powered on, ULPI pins tri-state.
10 DATA5 bidirectional ULPI bi-directional data bus, bit 5. CMOS I/O.
11 DATA6 bidirectional ULPI bi-directional data bus, bit 6. CMOS I/O.
12 DATA7 bidirectional ULPI bi-directional data bus, bit 7 (MSB). CMOS I/O.
13 DP bidirectional USB D+ data line (analog I/O). Connects to the D+ conductor of the USB cable.
14 DM bidirectional USB D- data line (analog I/O). Connects to the D- conductor of the USB cable.
15 VDD33 power_out 3.3V internal LDO regulator output. Requires a 1.0uF (<1 Ω ESR) bypass capacitor to ground placed as close as possible to the device. Do NOT tie VDD33 directly to VBAT.
16 VBAT power_in Regulator input supplying the internal 3.3V LDO. Operating range 3.0V to 5.5V.
17 VBUS bidirectional VBUS comparator input and VBUS pulsing output for OTG session request protocol (analog I/O). Connect to the USB connector VBUS through the external RVBUS resistor. Integrated OVP protects the pin up to 30V DC.
18 ID input USB OTG ID input (analog). For device applications tie to VDD33; for host applications tie to GND; for OTG applications connect to the USB connector ID pin.
19 RBIAS passive Bias resistor pin. Requires an 8.06kΩ (±1%) resistor to GND placed as close as possible to the device. Nominal voltage during ULPI operation is 0.8V.
20 XO output Crystal oscillator output. Connect together with REFCLK/XI to an external crystal. If using an external reference clock on REFCLK/XI, this pin should be left floating.
21 REFCLK/XI input Reference clock input / crystal input (CMOS input). In ULPI Clock Output Mode this accepts a model-specific reference clock (26MHz for USB3343) or an external crystal on XI. In ULPI Clock Input Mode this pin accepts a 60MHz ULPI clock input.
22 RESETB input Active-low reset (CMOS input). When low the part is suspended and the 3.3V and 1.8V regulators are disabled. When high the USB3343 operates as a normal ULPI device. Assert low for a minimum of 1 μs then de-assert to reset ULPI registers and internal state machines.
23 VDD18 power_out 1.8V internal LDO regulator output. Requires a 1.0uF (<1 Ω ESR) bypass capacitor to ground placed as close as possible to the device.
24 STP input ULPI 'stop' input (CMOS, active high). Asserted by the Link for one clock cycle to stop the data stream currently on the bus; when the Link is sending data to the PHY, STP indicates the last byte was on the bus in the previous cycle.
25 GND power_in Exposed thermal pad / package flag. Must be connected to ground.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-24-EP(4x4)
Category Interface
Pins 25

Ordering variants

Same part, different packaging or reel option.

  • USB3343-CP-TR

CAD (KiCad official)

  • Symbol: USB3343-CP-TR
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: usb3343-cp-tr-etched.step / usb3343-cp-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); usb3343-cp-tr.step / usb3343-cp-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (92 pp, sha256 a700237b5fdfb1fb, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF