UC3845BDTR from XBLW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	COMP	output	Error amplifier compensation output. Connect external compensation network (Zf) between this pin and VFB (pin 2) to shape the error-amplifier loop response.
2	VFB	input	Inverting input of the internal error amplifier used to close the voltage-feedback loop of the power converter. Typically compared against the internal 2.5 V reference at the non-inverting input.
3	ISENSE	input	Primary-side current-sense input. Connect to the current-sensing resistor; the PWM uses this signal (max threshold ~1.0 V, gain 3 V/V) to terminate OUTPUT switch conduction on a cycle-by-cycle basis.
4	RT/CT	passive	Oscillator timing node. Connect timing resistor RT from this pin to VREF and timing capacitor CT from this pin to GROUND to set the switching frequency (up to 500 kHz) and maximum output duty cycle.
5	GND	power_in	Device ground return. Timing and bypass capacitors must be tied to this pin at a single point to avoid ground-current disturbance of the analog sections.
6	OUTPUT	output	High-current totem-pole gate driver output for an external power MOSFET. Peak source/sink currents up to 1 A; enters high-impedance state during UVLO.
7	VCC	power_in	Positive supply input to the device. Operating range up to 30 V absolute maximum; UVLO turn-on 8.2 V typ, turn-off 7.6 V typ (UC3845B). Internal zener clamp ~34 V.
8	VREF	power_out	Buffered 5.0 V (±2%) internal reference output. Provides charging current to the oscillator timing capacitor through the timing resistor and can source up to ~20 mA for external circuitry.

Key specifications

Parameter	Value
Manufacturer	XBLW
Package	SOP-8
Category	PMIC
Pins	8

Ordering variants

Same part, different packaging or reel option.

UC3845BDTR
UC3845BDTRAN

CAD (KiCad official)

Symbol: UC3845BDTR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`uc3845bdtr.step`	122 KB	You want the bare part, or you mark your own boards.
`uc3845bdtr-etched.step`	2.4 MB	You want the part with `UC3845BDTR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 582 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XBLW datasheet (14 pp, sha256 2785bb3bf513f1c6, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF