TX6128 from XDS, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Device ground reference. Connect to the system ground plane; the current-sense resistor RCS return should route with short/wide traces to GND to preserve current-regulation accuracy.
2	NC	unconnected	No connection. Leave floating (per datasheet '悬空').
3	DIM	input	Dimming control input. Supports PWM dimming and linear dimming (linear range 1.1-3.1V, ≥3.1V = 100% output, ≤0.9V = LED off). Must not be left floating; tie high when dimming is unused, and add ≥10nF to GND for linear dimming.
4	SW	power_out	Switch node; internally connected to the drain of the integrated 100V power MOSFET (RDS(on) ≈ 210mΩ at VGS=5V). Connects to the buck inductor / freewheel diode cathode in the standard step-down LED topology.
5	CS	input	Inductor peak current sense input. Tied internally in parallel with pin 6; connect to the top of the external current-sense resistor RCS. Peak threshold VCS_TH ≈ 255mV (245-265mV).
6	CS	input	Inductor peak current sense input (paralleled with pin 5). Connect to the same node at the top of RCS with short/wide traces to minimize parasitic resistance error.
7	TOFF	input	Off-time programming pin. Fixed off-time is set by an external capacitor COFF per TOFF = 0.51 × 150kΩ × (COFF + 7.3pF) + TD (TD = 61ns). If left open, the internal minimum off-time defaults to ~650ns.
8	VDD	power_in	Chip supply. Internally clamped by a shunt regulator to ~5.5V (max clamp current 10mA). Fed from VIN through an external dropping resistor RVDD sized for the operating current (typ. 1.5mA at 200kHz).
9	EP	power_out	Exposed thermal pad on the ESOP-8 underside. Internally connected to SW (MOSFET drain). Solder to a copper area electrically tied to the SW node for heat dissipation - do NOT connect to GND.

Key specifications

Parameter	Value
Manufacturer	XDS
Package	ESOP-8
Category	LED-drv
Pins	9

CAD (KiCad official)

Symbol: TX6128
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
3D model: ESOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tx6128.step`	193 KB	You want the bare part, or you mark your own boards.
`tx6128-etched.step`	1.2 MB	You want the part with `TX6128` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 302 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XDS datasheet (7 pp, sha256 445f3da27fe5f2f2, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF