TX6120 from XDS, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground return for the IC. Connect to the low side of the current-sense resistor R2 and to the system ground plane with a short, wide trace.
2	NC	unconnected	No connect. Leave floating (悬空不接).
3	DIM	input	Dimming input. Pulling DIM to GND disables the LED output; >1.3V forces 100% output. Supports both PWM dimming and linear dimming (linear range 0.3-1.25 V). Must not be left floating; a small cap (>=10nF) to GND is recommended in linear-dimming mode.
4	SW	output	Switch node. Internally connected to the drain of the 100V integrated power MOSFET (RDS(on) ≈ 150 mΩ at VGS=5V). Connect to the buck inductor and freewheeling diode. Exposed pad (EP) is also tied here.
5	CS	input	Current-sense input (peak current detection). Connect together with pin 6 to the top of the sense resistor R2. Peak trip threshold VCS_TH ≈ 255 mV (245-265 mV).
6	CS	input	Current-sense input (duplicate CS pin). Tied to pin 5 and to the top of the current-sense resistor R2 for peak-current control.
7	TOFF	input	Fixed off-time setting. Off-time is set by an external capacitor C1: TOFF = 0.51 × 150 kΩ × (C1 + 8 pF) + TD, with TD = 61 ns. If left unconnected, internal default off-time is 650 ns.
8	VDD	power_in	Supply input for the IC. Fed from VIN through a series resistor R1; an internal 5.5 V clamp/zener regulates VDD (max clamp current 10 mA). Operating input voltage range for the application 3.6-100 V (from VIN); UVLO ≈ 3.2 V with 0.5 V hysteresis; typical operating current 1.5 mA @ 200 kHz.
9	EP	output	Exposed thermal pad on the bottom of the ESOP-8. Internally connected to SW (MOS drain). Solder to the SW copper pour for heat dissipation; do NOT connect to GND.

Key specifications

Parameter	Value
Manufacturer	XDS
Package	ESOP-8
Category	LED-drv
Pins	9

CAD (KiCad official)

Symbol: TX6120
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
3D model: ESOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tx6120.step`	193 KB	You want the bare part, or you mark your own boards.
`tx6120-etched.step`	1.1 MB	You want the part with `TX6120` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 288 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XDS datasheet (7 pp, sha256 a0dd331e5b699e8f, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF