TX4310B from XDS, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VOUT	power_out	Regulated charge-pump voltage output, nominally 3.3 V ±4% (3.17-3.43 V). Requires a low-ESR (<0.1 Ω) ceramic bypass capacitor of ≥10 µF to GND for stability and low output ripple. Can source up to ~250 mA at VIN=3 V; internally current-limited to ~300 mA under short-circuit.
2	GND	power_in	Device ground / power return. Should be tied to a solid ground plane; bypass capacitors on VDD and VOUT should return to this pin with the shortest possible traces to minimize switching noise at the 1.2 MHz pump frequency.
3	EN	input	Active-high CMOS enable input with a threshold of ~0.8 V; driving EN low places the part in shutdown (all internal circuitry off, VOUT disconnected from VDD, IQ <1 µA). High-impedance CMOS input - MUST NOT be left floating; always drive with a valid logic level. Absolute-max VEN = -0.3 V to 6 V.
4	C-	passive	Negative terminal of the flying (bootstrap) charge-pump capacitor. Connect between C- (pin 4) and C+ (pin 6) a low-ESR ceramic capacitor (≥2.2 µF recommended to achieve rated output current). Never use polar capacitors (tantalum/aluminum) here - the pin voltage can reverse during startup.
5	VDD	power_in	Input supply pin, 1.8 V to 5 V operating range (absolute-max 6 V). Requires a low-ESR (<0.1 Ω) ceramic bypass capacitor of ≥10 µF to GND placed close to the pin to minimize input ripple. No-load supply current ~0.65 mA (typ, VIN=2.7 V); shutdown current <1 µA.
6	C+	passive	Positive terminal of the flying (bootstrap) charge-pump capacitor. Connect a low-ESR ceramic capacitor (≥2.2 µF) between C+ (pin 6) and C- (pin 4). Do not use tantalum or aluminum electrolytics; polarity across this capacitor can reverse during startup.

Key specifications

Parameter	Value
Manufacturer	XDS
Package	SOT-23-6
Category	PMIC
Pins	6

CAD (KiCad official)

Symbol: TX4310B
Footprint: Package_TO_SOT_SMD:SOT-23-6
3D model: SOT-23-6 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tx4310b.step`	97 KB	You want the bare part, or you mark your own boards.
`tx4310b-etched.step`	1.4 MB	You want the part with `TX4310B` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 368 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XDS datasheet (7 pp, sha256 4874b5b97ef9b7e0, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF