TX4138 from XDS, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SW	output	Switch node output. Source of the internal high-side power MOSFET; connect this pin to the switching end of the inductor and to the cathode of the external freewheeling Schottky diode. Absolute maximum: -0.3V to VIN + 0.3V.
2	ILIM	power_in	Programmable maximum peak current pin. Power current flows into the chip through an external accurate sense resistor connected between ILIM and VIN; the sense resistor value (~15-30mΩ) sets the peak current limit (30mΩ for 2A, 20mΩ for 3A, 15mΩ for 4A). Internally tied to the power MOSFET, so heat dissipation on this pin matters. Absolute maximum: 62V.
3	VIN	power_in	Supply voltage input, 4.5V to 60V unregulated. Also the drain of the internal high-side power MOSFET and power supply for the whole chip. A local input capacitor (CIN) placed as close to the IC as possible is required to prevent large voltage spikes. Absolute maximum: 62V.
4	GND	power_in	Ground return and voltage reference for the regulated output. Should be routed carefully outside the D1-to-CIN high-current ground path to prevent switching current spikes from injecting noise into the part.
5	FB	input	Feedback input to the error amplifier. An external resistor divider from VOUT to GND, tapped to FB, sets the output voltage; reference is 0.805V (typ, 0.785-0.825V). When FB falls below 250mV a frequency-fold-back comparator reduces oscillator frequency to prevent short-circuit current-limit runaway. Bias current ~10nA. Absolute maximum: -0.3V to +6.5V.
6	EN	input	Enable input. Drive low to disable (turn off) the chip; leave floating (or drive high) to enable. Absolute maximum: -0.3V to +6.5V.
7	POK	output	Power-good open-drain output. Pulled low while FB is less than 90% of the 0.8V reference; goes high-Z when output is in regulation. Requires an external pull-up (e.g. 10kΩ) to a system rail up to 45V; can also drive the enable pin of a downstream converter. Tie to GND or leave floating if unused. Absolute maximum: 0V to 45V.
8	BS	passive	Bootstrap capacitor pin. Provides the positive supply rail for the high-side MOSFET gate driver (VBST - VSW = 6V typ). Connect a 100nF ceramic capacitor and a series ~5-10Ω resistor between BS and SW. Absolute maximum: VSW + 6.0V.
9	ILIM (EP)	power_in	Exposed thermal pad, internally connected to the ILIM node (same net as pin 2). Provides the primary heat-dissipation path for the internal power MOSFET and must be soldered to a copper pour that also carries the ILIM/sense-resistor current back to VIN.

Key specifications

Parameter	Value
Manufacturer	XDS
Package	SOIC-8-EP
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

TX4138

CAD (KiCad official)

Symbol: TX4138
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tx4138.step`	125 KB	You want the bare part, or you mark your own boards.
`tx4138-etched.step`	1.4 MB	You want the part with `TX4138` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 369 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XDS datasheet (7 pp, sha256 cd9a50cd55184667, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF