component
TX4115
Public Made by Adomby adom
XDS DC-DC Converters, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownTX4115
XDS · DC-DC Converters · SOP-8
TX4115 from XDS, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Output voltage feedback input. Connect to the midpoint of an external resistor divider from VOUT to GND. The internal error amplifier regulates this pin to the 1.21V reference (VREF). R1 = R2*(VOUT/VREF - 1). |
| 2 | TOFF | input | Oscillator/switching frequency setting pin. Connect a resistor from TOFF to GND to set the switching frequency: RTOFF(kΩ) = (6500/Fosc[kHz])^2. Resistor range 130kΩ to 1.5MΩ; leaving TOFF floating defaults to ~130kHz. Internally held at 0.6V. |
| 3 | ILIM | input | Peak current limit programming pin. Connect an external resistor R4 from ILIM to GND to set the peak inductor current limit: R4(kΩ) = 23 * IMAX(A). Typical detection current 8.5µA. If left floating, default peak current limit is 2.7A. |
| 4 | VDD | power_in | Chip supply input, 8V to 30V (absolute max 35V). Bypass with a 100µF low-ESR capacitor to GND close to the pin to suppress input transients. UVLO threshold ~4.25-4.5V. |
| 5 | SW | output | Switching node. Connect the external output inductor here. Internally tied to the drains of both the high-side PMOS and low-side NMOS power switches. Pins 5 and 6 are shorted internally to share switch current. |
| 6 | SW | output | Switching node (parallel with pin 5). Connect the external output inductor here. Tie pins 5 and 6 together for full current handling. |
| 7 | GND | power_in | Chip ground. Analog/power return. Pins 7 and 8 are both GND and should both be tied to the ground plane; they also provide the primary thermal path for the SOP-8 package. |
| 8 | GND | power_in | Chip ground (parallel with pin 7). Tie to the ground plane along with pin 7 for low-impedance return and heat sinking. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XDS |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | -0.3 | 35 | V | 3 | |||
| FB/ILIM/TOFF voltage | -0.3 | 6 | V | 3 | |||
| SW pin voltage | -0.3 | V | 3 | ||||
| Maximum power dissipation | P_SOP8 | 0.8 | W | SOP8 | 3 | ||
| Operating temperature | TA | -40 | 85 | ℃ | 3 | ||
| Storage temperature | T_STG | -65 | 150 | ℃ | 3 | ||
| Supply voltage range | VDD | 8 | 30 | V | 4 | ||
| Input threshold voltage (UVLO) | V_UVLO | 4.25 | 4.5 | V | 4 | ||
| UVLO hysteresis voltage | ∆V_UVLO | 50 | 100 | mV | 4 | ||
| Quiescent current | IQ | 10 | 15 | 20 | mA | ILOAD=0A | 4 |
| Feedback voltage | V_FB | 1.18 | 1.21 | 1.24 | V | 4 | |
| Current-limit detection pin current | I_LIM-TH | 7 | 8.5 | 10 | uA | 4 | |
| Maximum oscillation frequency | Fosc_MAX | 500 | KHz | 4 | |||
| Maximum duty cycle | DC | 90 | % | 4 |
CAD (KiCad official)
- Symbol:
TX4115 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
tx4115-etched.step/tx4115-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tx4115.step/tx4115.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tx4115.step |
122 KB | You want the bare part, or you mark your own boards. |
tx4115-etched.step |
1.1 MB | You want the part with TX4115 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 306 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XDS datasheet (9 pp, sha256
5eba4f131236225b, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).