TX4114 from XDS, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VFB	input	Output voltage feedback pin. Connect to the mid-point of the R1/R2 divider from VOUT to GND. The internal regulation comparator references Vref = 1.21 V, so VOUT = 1.21 * (R1/R2 + 1). Feedback input current is ~0.05 uA.
2	TOFF	passive	Oscillator / switching-frequency programming pin. Connect a resistor R4 to GND to set FOSC, per R4(kOhm) = 22000 / FOSC(kHz). Programmable range 150 kHz to 500 kHz (typ 220 kHz at R4 = 100 kOhm). Absolute max on this pin is -0.3 to 6 V.
3	CUR	passive	Output current-limit programming pin. Connect a resistor R3 to GND to set the current limit, per R3(kOhm) = 29.523 * IOUT. Internal current-limit comparator sink current is typ 8.5 uA (7-10 uA). Absolute max on this pin is -0.3 to 6 V.
4	VDD	power_in	Chip power supply input (also labeled VIN in the typical application). Operating range 8-30 V, absolute max -3.3 to 32 V. Requires an external electrolytic bulk-decoupling capacitor to GND. Quiescent current is ~10-20 mA at no load.
5	SW1	output	Switch node output 1. Internally tied together with SW2 (pin 6) to the drain junction of the integrated high-side P-MOSFET (Rds(on) ~65 mOhm) and low-side N-MOSFET (Rds(on) ~30 mOhm). Connect to the external inductor of the buck output filter. Absolute max -0.3 to 32 V.
6	SW2	output	Switch node output 2. Internally the same node as SW1 (pin 5) - the pins are paralleled for current handling. Connect together with SW1 to the external inductor. Absolute max -0.3 to 32 V.
7	GND	power_in	Chip ground / power return. Internally common with pin 8; both should be tied to the PCB ground plane for the power stage return current.
8	GND	power_in	Chip ground / power return. Internally common with pin 7; both should be tied to the PCB ground plane for the power stage return current.

Key specifications

Parameter	Value
Manufacturer	XDS
Package	SOP-8
Category	PMIC
Pins	8

CAD (KiCad official)

Symbol: TX4114
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tx4114.step`	122 KB	You want the bare part, or you mark your own boards.
`tx4114-etched.step`	1.0 MB	You want the part with `TX4114` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 291 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XDS datasheet (6 pp, sha256 99888ddfe5df6838, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF