TPT75176HL1-SO1R
Public Unreviewedby Ray
3PEAK Buffer/Driver/Transceiver, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownTPT75176HL1-SO1R
3PEAK · Buffer/Driver/Transceiver · SOP-8
TPT75176HL1-SO1R from 3PEAK, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receiver output. CMOS logic level output of the RS-485 differential receiver; typically drives >25 mA at V_OL=1V. High when V_ID = V_A - V_B > V_IT+ (typ -40 mV), low when V_ID < V_IT- (typ -155 mV). High-Z when /RE is high. |
| 2 | /RE | input | Receiver enable, active low. Drive low to enable the receiver output R; drive high or leave open to place R in high-impedance. Logic thresholds V_IH ≥ 2V, V_IL ≤ 0.8V. |
| 3 | DE | input | Driver enable, active high. Drive high to enable the differential driver outputs A and B; drive low or leave open to place A/B in high-impedance. Logic thresholds V_IH ≥ 2V, V_IL ≤ 0.8V. |
| 4 | D | input | Driver data input. Logic-level input sampled by the driver: when DE is high, D=high drives A high/B low, D=low drives A low/B high. Left open, the internal fail-safe drives the bus high when DE=H. |
| 5 | GND | power_in | Ground reference (0 V) for the device. |
| 6 | A | bidirectional | Non-inverting differential bus I/O (RS-485 A line). Driver output when DE=high (paired with B); receiver non-inverting input otherwise. Withstands -7V to +12V common mode, ±15kV HBM / ±15kV IEC ESD, and ±100V transient through 100Ω. |
| 7 | B | bidirectional | Inverting differential bus I/O (RS-485 B line). Driver output when DE=high (paired with A); receiver inverting input otherwise. Withstands -7V to +12V common mode, ±15kV HBM / ±15kV IEC ESD, and ±100V transient through 100Ω. |
| 8 | VCC | power_in | Supply voltage input, 3.0 V to 5.5 V. Quiescent supply current typ 1.65 mA (both driver and receiver disabled), up to ~2.2 mA when enabled. Bypass with a 0.1 µF ceramic close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOP-8 |
| Category | Logic |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
TPT75176HL1-SO1RTPT75176H-VS1RTPT75176HL1-DF6R
CAD (KiCad official)
- Symbol:
TPT75176HL1-SO1R - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tpt75176hl1-so1r.step |
122 KB | You want the bare part, or you mark your own boards. |
tpt75176hl1-so1r-etched.step |
2.4 MB | You want the part with TPT75176HL1-SO1R already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 613 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (17 pp, sha256
1b99611330e77256, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).