TPT75176B-SO1R from 3PEAK, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	R	output	Receiver output. Drives logic-high when VID = VA - VB > VIT+ (typ -10 mV), logic-low when VID < VIT- (typ -130 mV). High-drive output (>25 mA typ @ VOL=1V) suitable for driving optically isolated interfaces. Full fail-safe: outputs high when bus is open, shorted, or idle. High-Z when /RE is high or open.
2	/RE	input	Receiver enable (active-low). Drive low to enable the receiver; drive high (or leave open) to place the R output in high-impedance. Logic input thresholds VIH ≥ 2 V, VIL ≤ 0.8 V; input current ±2 μA max.
3	DE	input	Driver enable (active-high). Drive high to enable the driver output onto A/B; drive low (or leave open) to place A/B in high-impedance. Logic input thresholds VIH ≥ 2 V, VIL ≤ 0.8 V; input current ±2 μA max.
4	D	input	Driver data input. When DE is high, a logic-high on D drives bus A high and B low; logic-low drives A low and B high. Logic input thresholds VIH ≥ 2 V, VIL ≤ 0.8 V; input current ±2 μA max. Floating D with DE=H results in driving bus high (internal pull-up behavior).
5	GND	power_in	Ground reference for the device. Connect to system ground.
6	A	bidirectional	Non-inverting RS-485 differential bus pin. Driver output when DE=H; receiver non-inverting input when /RE=L. Common-mode range -7 V to +12 V; absolute limits -9 V to +14 V (±100 V transient through 100 Ω). ±12 kV HBM / ±8 kV IEC contact / ±15 kV IEC air-discharge ESD protected.
7	B	bidirectional	Inverting RS-485 differential bus pin. Driver output when DE=H; receiver inverting input when /RE=L. Common-mode range -7 V to +12 V; absolute limits -9 V to +14 V (±100 V transient through 100 Ω). ±12 kV HBM / ±8 kV IEC contact / ±15 kV IEC air-discharge ESD protected.
8	VCC	power_in	Supply voltage input. Recommended operating range 3.0 V to 5.5 V; absolute max 7 V. Quiescent supply current 3 mA typical (both driver and receiver enabled). Bypass locally with a 0.1 μF ceramic capacitor to GND.

Key specifications

Parameter	Value
Manufacturer	3PEAK
Package	SOP-8
Category	PMIC
Pins	8

Ordering variants

Same part, different packaging or reel option.

TPT75176B-SO1R
TPT75176B-SO1RVS1R
TPT75176B-SO1RDF6R

CAD (KiCad official)

Symbol: TPT75176B-SO1R
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tpt75176b-so1r.step`	122 KB	You want the bare part, or you mark your own boards.
`tpt75176b-so1r-etched.step`	2.4 MB	You want the part with `TPT75176B-SO1R` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 601 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: 3PEAK datasheet (10 pp, sha256 e7813b3b66193828, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF