TPS62152
Public Unreviewedby Ray
TI 1 A synchronous step-down converter, VQFN-16. 3-17 V in, adjustable frequency, power-good. Datasheet-verified.
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markdownTPS62152
Texas Instruments · Switching regulator (buck) · VQFN-16
Steps a 3 to 17 V input down to a regulated rail at up to 1 A, with both MOSFETs integrated and a resistor divider at FB setting the output. The switching frequency is adjustable at FSW to balance efficiency against size, a DEF pin picks the light-load mode, soft-start is programmable at SS/TR, and a power-good flag reports regulation. Separate analog and power supply and ground pins keep the reference quiet. The 1 A member of the TPS6215x family, the same footprint as the 3 A TPS62130.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switch node connected to the internal high-side and low-side MOSFETs. Connect the external inductor between SW and the output capacitor. Pins 1, 2, 3 are tied internally and must be shorted together on the PCB. |
| 2 | SW | output | Switch node (tied to pin 1 and 3). Connect the inductor between SW and the output capacitor. |
| 3 | SW | output | Switch node (tied to pin 1 and 2). Connect the inductor between SW and the output capacitor. |
| 4 | PG | output | Power-good output. Open-drain: high (via external pull-up) when VOUT is within regulation (rising threshold ~95% of VOUT), low when VOUT falls below ~90% of nominal. Max sink current 10 mA; VPG max 7 V. |
| 5 | FB | input | Voltage feedback pin. For adjustable-output variants (TPS62150/A) connect an external resistor divider from VOUT to FB (internal reference 0.8 V). For the fixed 3.3-V TPS62152 the internal divider is used; TI recommends tying FB to AGND on fixed-output versions for improved thermal performance. |
| 6 | AGND | power_in | Analog ground for internal control circuitry. Must be connected directly to the exposed thermal pad and to the common ground plane. |
| 7 | FSW | input | Switching-frequency select. Logic low (tied to AGND) selects ~2.5 MHz; logic high (tied to VOUT or PG) selects ~1.25 MHz. Internal pulldown holds it low if left floating. VIH >= 0.9 V, VIL <= 0.3 V. |
| 8 | DEF | input | Output-voltage scaling (DEFault). Low = nominal VOUT (3.3 V); high = nominal + 5%. Internal pulldown holds it low if floating. VIH >= 0.9 V, VIL <= 0.3 V. |
| 9 | SS/TR | input | Soft-Start / Tracking pin. An external capacitor to AGND sets the internal-reference rise time (typ ISS/TR = 2.5 uA source current). Can be driven by an external ramp for tracking/sequencing with another rail. |
| 10 | AVIN | power_in | Supply voltage for internal analog control circuitry (3 V to 17 V). Must be connected to the same source as PVIN. Bypass locally to AGND. |
| 11 | PVIN | power_in | Power-stage supply voltage (3 V to 17 V). Pins 11 and 12 are tied internally; connect both to the same source as AVIN with a 10 uF input bypass capacitor to PGND. |
| 12 | PVIN | power_in | Power-stage supply voltage (tied to pin 11). Connect to the same source as AVIN and bypass to PGND. |
| 13 | EN | input | Enable input. High enables the converter, low disables it and puts the device into shutdown (< 2 uA). Internal pulldown keeps EN low if floating. VIH >= 0.9 V, VIL <= 0.3 V; max 7 V. |
| 14 | VOS | input | Output voltage sense pin for the control loop. Connect directly to VOUT at the output capacitor for accurate remote sensing / regulation. |
| 15 | PGND | power_in | Power ground for the low-side MOSFET return current. Pins 15 and 16 are tied internally; must connect directly to the exposed thermal pad and the common ground plane. |
| 16 | PGND | power_in | Power ground (tied to pin 15). Connect directly to the exposed thermal pad and common ground plane. |
| 17 | EP | power_in | Exposed thermal pad. Must be soldered to a common ground plane and connected to AGND (pin 6) and PGND (pins 15,16) for proper heat dissipation and mechanical reliability (RθJA ~ 45 °C/W). |
Key specifications
| Parameter | Value |
|---|---|
| Type | Synchronous step-down converter |
| Input | 3-17 V |
| Output current | 1 A |
| Switching freq | Adjustable (FSW pin) |
| Modes | Power-save or forced-PWM (DEF) |
| Extras | Power-good, adjustable soft-start |
| Package | VQFN-16 |
Ordering variants
Same part, different packaging or reel option.
TPS62152RGTR (VQFN-16)TPS62153RGTR (fixed output variant)
CAD (KiCad official)
- Symbol:
Regulator_Switching:TPS62152 (KiCad official) - Footprint:
Package_DFN_QFN:VQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm_ThermalVias - 3D model: VQFN-16 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
b418ca870d5105a3, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).