Boosts a 1.8 to 5.5 V input up to a regulated rail as high as 5.5 V, with a 2 A integrated switch and synchronous rectification for good efficiency from a two-cell or single Li-ion source. A built-in low-battery comparator (LBI/LBO) flags a sagging pack, a SYNC pin sets or synchronizes the switching, and a resistor divider at FB sets the output. Power-save mode keeps light-load efficiency high. A capable boost for handheld and battery-powered gear.

Pinout

Pin	Name	Type	Function
1	VOUT	power_out	DC-DC boost converter output. Fixed 3.3 V on TPS61091; part of the 3-pin VOUT group (pins 1, 15, 16) - tie all three together at the output capacitor.
2	NC	unconnected	Not connected. Leave floating or tie to GND for mechanical stability; no internal bond.
3	SW	passive	Boost/rectifying switch node. Connect the external inductor between VBAT and SW (typ. 6.8 µH). Shared with pin 4 - bond both pins together for the 2-A switch current.
4	SW	passive	Boost/rectifying switch node (paired with pin 3). Peak switch current limited to 2500 mA.
5	PGND	power_in	Power ground return for the boost/rectifier switch. Tie pins 5, 6, 7 together to the PowerPAD and to the input/output capacitor grounds with a low-impedance plane.
6	PGND	power_in	Power ground (paired with pins 5 and 7).
7	PGND	power_in	Power ground (paired with pins 5 and 6).
8	VBAT	power_in	Battery / supply input, 1.8 V to 5.5 V. Bypass with ≥10 µF ceramic to PGND close to the pin. Also serves as the reference for the EN/SYNC logic high level (0.8 × VBAT).
9	LBI	input	Low-battery comparator input. Threshold 500 mV (typ) with 10 mV hysteresis; comparator is enabled with EN. Absolute-max input is 3.6 V - use an external divider to sense VBAT.
10	SYNC	input	Power-save mode select / external sync clock. 1 (≥0.8 × VBAT) = power-save disabled or apply a 500-700 kHz clock for synchronization; 0 (≤0.2 × VBAT) = power-save enabled.
11	EN	input	Device enable. 1 (VBAT) enables the converter and LBI/LBO comparator; 0 (GND) shuts the device down (load-disconnect from VBAT to VOUT).
12	LBO	output	Low-battery comparator output, open-drain. Requires external pull-up (to VOUT or system rail). VOL ≈ 40 mV at 100 µA; max leakage 0.1 µA at 7 V.
13	GND	power_in	Control/logic (analog) ground. Kelvin-connect to the PowerPAD ground plane away from the switching PGND current path.
14	FB	input	Voltage feedback for the adjustable version (TPS61090). On the fixed-output TPS61091 (3.3 V), feedback is internal - tie FB to VOUT via a direct connection per the datasheet's fixed-output usage.
15	VOUT	power_out	DC-DC output (paired with pins 1 and 16). Total output capacitance 22-100 µF recommended.
16	VOUT	power_out	DC-DC output (paired with pins 1 and 15).
17	PowerPAD	power_in	Exposed thermal pad on the package underside. Must be soldered to the PCB for rated power dissipation; connect to PGND plane.

Key specifications

Parameter	Value
Type	Synchronous boost converter
Input	1.8-5.5 V
Output	Up to 5.5 V (adjustable)
Switch current	2 A
Extras	Low-battery detector (LBI/LBO), SYNC
Light load	Power-save mode
Package	VQFN-16

Ordering variants

Same part, different packaging or reel option.

TPS61091RSAR (VQFN-16)
TPS61091RSAT (VQFN-16, small reel)

CAD (KiCad official)

Symbol: Regulator_Switching:TPS61091 (KiCad official)
Footprint: Package_DFN_QFN:Texas_RSA_VQFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm_ThermalVias
3D model: VQFN-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (30 pp, sha256 6378e47289a28cc3, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF