component

TPS3700DDCR

Public Made by Adom

by adom

Texas Instruments Comparators, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentop-amp-cmptps3700ddcr
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3D Model

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Datasheet

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Contents

README

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TPS3700DDCR

Texas Instruments · Comparators · SOT-23-6

TPS3700DDCR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Open-drain output A. Asserts (pulls low) when SENSEA drops below the internal 400 mV reference (undervoltage detection). Requires an external pull-up resistor to the desired logic rail.
2 GND power_in Device ground reference. Connect to system ground.
3 NC unconnected No internal connection. May be left floating or tied to GND.
4 SENSEB input Overvoltage sense input B. Compared against the internal 400 mV reference; OUTB asserts when SENSEB exceeds the reference. Drive from a resistor divider off the monitored rail. Input bias current is ~10 nA typical.
5 SENSEA input Undervoltage sense input A. Compared against the internal 400 mV reference; OUTA asserts when SENSEA falls below the reference. Drive from a resistor divider off the monitored rail. Input bias current is ~10 nA typical.
6 NC unconnected No internal connection. May be left floating or tied to GND.
7 VDD power_in Supply input. Operating range 1.6 V to 18 V. Bypass with a 0.1 uF ceramic capacitor to GND close to the pin.
8 OUTB output Open-drain output B. Asserts (pulls low) when SENSEB rises above the internal 400 mV reference (overvoltage detection). Requires an external pull-up resistor to the desired logic rail.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TPS3700DDCR
  • TPS3700DDCRDDCT

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VDD 1.8 18 V Over TJ = -40°C to +125°C 3
Positive-going input threshold voltage VITP 396 400 404 mV VDD = 1.8 V 3
Negative-going input threshold voltage VITN 387 394.5 400 mV VDD = 1.8 V 3
Hysteresis voltage VHYS 5.5 12 mV HYS = VITP – VITN 3
Input current (at IN pin) IIN -25 1 25 nA VDD = 1.8 V and 18 V, VIN = 6.5 V 3
Input current (at IN pin) IIN -15 1 15 nA VDD = 1.8 V and 18 V, VIN = 0.1 V 3
Low-level output voltage VOL 250 mV VDD = 1.3 V, IOUT = 0.4 mA 3
Open-drain output leakage current Ilkg(OD) 300 nA VDD = 1.8 V and 18 V, VOUT = VDD 3
Power-on reset voltage V(POR) 0.8 V VOL (max) = 0.2 V, I(OUT) = 15 µA 3
Supply current IDD 5.5 11 µA VDD = 1.8 V, no load 3
Supply current IDD 6 13 µA VDD = 5 V 3
Supply current IDD 7 13 µA VDD = 18 V 3
Undervoltage lockout UVLO 1.3 1.7 V VDD falling 3
Absolute maximum supply voltage VDD -0.3 20 V All voltages with respect to network ground terminal 2
Absolute maximum output voltage VOUTA, VOUTB -0.3 20 V All voltages with respect to network ground terminal 2
Absolute maximum input voltage VINA+, VINB– -0.3 7 V All voltages with respect to network ground terminal 2
Output pin current 40 mA 2
Operating junction temperature TJ -40 125 °C Over operating free-air temperature range 2
Storage temperature Tstg -65 150 °C 2
Electrostatic discharge, human body model (HBM) 2 kV JESD22 JEDEC standard 2
Electrostatic discharge, charge device model (CDM) 500 V JESD22 JEDEC standard 2
Junction-to-ambient thermal resistance (DDC) θJA 204.6 °C/W DDC (SOT23) 6-pin package 2
Junction-to-case (top) thermal resistance (DDC) θJCtop 50.5 °C/W DDC (SOT23) 6-pin package 2
Junction-to-board thermal resistance (DDC) θJB 54.3 °C/W DDC (SOT23) 6-pin package 2
Junction-to-top characterization parameter (DDC) ψJT 0.8 °C/W DDC (SOT23) 6-pin package 2
Junction-to-board characterization parameter (DDC) ψJB 52.8 °C/W DDC (SOT23) 6-pin package 2

CAD (KiCad official)

  • Symbol: TPS3700DDCR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tps3700ddcr-etched.step / tps3700ddcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3700ddcr.step / tps3700ddcr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps3700ddcr.step 97 KB You want the bare part, or you mark your own boards.
tps3700ddcr-etched.step 2.2 MB You want the part with TPS3700DDCR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 540 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 6daae6680a8ab6e8, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF