Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

TPS27081ADDCR

Texas Instruments · AC-DC Controllers and Regulators · SOT-23-6

TPS27081ADDCR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R2 output Source terminal of internal NMOS (Q2). Connect to system GND directly, or through an external slew-rate control resistor R2 to shape the ON/OFF transition and limit inrush current on CL.
2 VOUT power_out Drain terminal of the power PFET (Q1); switched output to the load. Pins 2 and 3 are internally the same VOUT node; connect a slew-control capacitor CL between VOUT and R1/C1 (pin 6) if needed.
3 VOUT power_out Drain terminal of the power PFET (Q1); switched output to the load. Tie pins 2 and 3 together on the board to share the full 3-A continuous / 9.5-A pulsed drain current.
4 VIN power_in Source terminal of the power PFET (Q1). Supply input, 1.2 V to 8 V (abs max 8 V vs R2). Connect a pull-up resistor R1 between VIN and the R1/C1 gate node (pin 6).
5 ON/OFF input Active-high enable input for the load switch; VIH >= 1 V, VIL <= 0.3 V, abs max 8 V. When driven by a high-impedance driver, connect an external pull-down resistor to GND to define the off state.
6 R1/C1 passive Gate terminal of the power PFET (Q1) and drain of the control NMOS (Q2). Connect the R1 pull-up resistor from VIN to this pin, and (optionally) a slew-shaping capacitor C1 between this pin and VOUT to control turn-on/turn-off dV/dt and inrush current.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • TPS27081ADDCR
  • TPS27081ADDCRDDCT

CAD (KiCad official)

  • Symbol: TPS27081ADDCR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps27081addcr.step 97 KB You want the bare part, or you mark your own boards.
tps27081addcr-etched.step 2.4 MB You want the part with TPS27081ADDCR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 588 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 1380107318824b49, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF