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TPS2372-3RGWT

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Texas Instruments Power Over Ethernet (PoE) Controllers, VQFN-20-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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TPS2372-3RGWT

Texas Instruments · Power Over Ethernet (PoE) Controllers · VQFN-20-EP(5x5)

TPS2372-3RGWT from Texas Instruments, in a VQFN-20-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive PoE input supply rail (0-57V); bypass to VSS with 0.1µF capacitor.
2 DEN bidirectional Detection and enable pin; connect 24.9kΩ resistor to VDD for PoE detection (1.4-10.9V range); pull to VSS to disable pass-through MOSFET during powered operation.
3 CLSA output First classification current output; connect resistor to VSS to program Class A current per IEEE 802.3bt Table 1.
4 VSS power_in Negative power supply rail from PoE source; connect to PCB ground plane.
5 VSS power_in Negative power supply rail from PoE source; connect to PCB ground plane.
6 CLSB output Second classification current output; connect resistor to VSS to program Class B current per IEEE 802.3bt Table 1.
7 REF output 1.5V internal voltage reference output; connect 49.9kΩ ±1% resistor to VSS.
8 AMPS_CTL output Automatic MPS control output (23.1-24.9V pulses); connect 1-12kΩ resistor to VSS to set MPS current amplitude, maximum 50mA.
9 MPS_DUTY input MPS duty cycle selection input (0-5.5V); resistor value to VSS selects 5.4% (open), 8.1% (60.4kΩ), or 12.5% (shorted) duty for Type 3-4 PSE.
10 AUTCLS input Autoclass enable input (0-6.5V); internally pulled to 5.5V during classification; pull to VSS to enable Autoclass, keep open otherwise.
11 RTN output PoE pass-through MOSFET drain; output return path referenced to VSS with voltage dependent on load current (0-100V).
12 RTN output PoE pass-through MOSFET drain; output return path referenced to VSS with voltage dependent on load current (0-100V).
13 PG tri_state Power good output (0-100V referenced to RTN); open-drain active-high (0.5V maximum low); indicates startup inrush completion.
14 NC unconnected No connection; leave floating.
15 NC unconnected No connection; leave floating.
16 IRSHDL_EN input Inrush delay enable input (-0.3 to 6.5V referenced to RTN); internally pulled to 5.5V; keep open for 81.5ms minimum delay, connect to RTN to disable.
17 TPL tri_state PSE allocated power output lower bit (0-100V referenced to RTN); open-drain active-high (0.5V maximum low); binary coded power level.
18 TPH tri_state PSE allocated power output upper bit (0-100V referenced to RTN); open-drain active-high (0.5V maximum low); binary coded power level.
19 BT tri_state IEEE 802.3bt detection indicator (-0.3 to 100V referenced to RTN); open-drain active-low (0.5V maximum low); signifies Type 3 or 4 PSE support.
20 NC unconnected No connection; keep open.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-20-EP(5x5)
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS2372-3RGWT
  • Footprint: Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm
  • 3D model: VQFN-20-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: tps2372-3rgwt-etched.step / tps2372-3rgwt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2372-3rgwt.step / tps2372-3rgwt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 c83bfda2432136d5, retrieved 2026-09-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF