TP8485E-SR from 3PEAK, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	R	output	Receiver output. CMOS logic level output derived from the differential bus (A/Y − B/Z). High-Z when the receiver is disabled (/RE = high or open). VOH ≥ 4.64 V and VOL ≤ 0.27 V at ±8 mA drive with VCC = 5 V.
2	/RE	input	Receiver enable, active low. Drive low to enable the receiver output R; drive high or leave open to place R in high-impedance. CMOS input, typical input current 10 nA.
3	DE	input	Driver enable, active high. Drive high to enable the differential driver outputs A/Y and B/Z; drive low or leave open to place the driver outputs in high-impedance. CMOS input, typical input current 10 nA.
4	D	input	Driver data input. CMOS logic level input; when the driver is enabled, D=H drives A/Y high and B/Z low, D=L drives the opposite. Left open the driver behaves as if D=H (actively drives bus high). Referenced to VCC/GND.
5	GND	power_in	Ground return for the device. Connect to the system ground plane; also serves as the reference for the bus common-mode voltage range of -8 V to +13 V.
6	A/Y	bidirectional	Non-inverting RS-485 bus pin. Acts as receiver input A when the driver is disabled and as driver output Y when the driver is enabled. Withstands -15 V to +15 V DC and ±18 kV IEC61000-4-2 air-gap ESD; common-mode range -8 V to +13 V.
7	B/Z	bidirectional	Inverting RS-485 bus pin. Acts as receiver input B when the driver is disabled and as driver output Z when the driver is enabled. Same absolute ratings as A/Y: -15 V to +15 V DC, ±18 kV IEC61000-4-2 air-gap ESD, common-mode -8 V to +13 V.
8	VCC	power_in	Positive supply, 3.0 V to 5.5 V recommended (absolute max 7 V). Bypass locally with a 100 nF ceramic capacitor to GND. Quiescent supply current is typically 695 µA with both driver and receiver enabled and no load.

Key specifications

Parameter	Value
Manufacturer	3PEAK
Package	SOIC-8
Category	Interface
Pins	8

Ordering variants

Same part, different packaging or reel option.

TP8485E-SR
TP8485E-SRVR

CAD (KiCad official)

Symbol: TP8485E-SR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tp8485e-sr.step`	122 KB	You want the bare part, or you mark your own boards.
`tp8485e-sr-etched.step`	2.3 MB	You want the part with `TP8485E-SR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 550 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: 3PEAK datasheet (15 pp, sha256 f7225ec86054a77b, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF