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Contents

README

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TLV431AFTA

Diodes Incorporated · Voltage Reference · SOT-23

TLV431AFTA from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference / feedback input. Compared internally to the 1.24 V bandgap reference; drives the internal error amplifier that regulates cathode current so that V(REF) equals VREF. Typical input current 0.15 uA (0.5 uA max); absolute maximum input current range -0.05 to +3 mA.
2 CATHODE power_in Cathode (K). Regulated shunt terminal; sinks current from the load/bias resistor to maintain V(REF) = 1.24 V. Recommended operating cathode voltage VREF to 18 V; cathode current 0.1 mA to 15 mA (absolute max +/-20 mA, VKA max 20 V). Minimum cathode current for regulation IKMIN ~ 55 uA typ.
3 ANODE power_in Anode (A). Common return terminal; all datasheet voltages are referenced to ANODE. Normally tied to the low-voltage rail (GND) of the regulated network.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • TLV431AFTA
  • TLV431AFTAE5
  • TLV431AFTAH6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Reference Voltage (TA = +25°C) VREF 1.228 1.24 1.252 V TLV431A; VKA = VREF, TA = +25°C 3
Reference Voltage (TA = 0 to +70°C) VREF 1.221 1.259 V TLV431A; VKA = VREF, TA = 0 to +70°C 3
Reference Voltage (TA = -40°C to +85°C) VREF 1.215 1.265 V TLV431A; VKA = VREF, TA = -40°C to +85°C 3
Reference Voltage (TA = -40°C to +125°C) VREF 1.209 1.271 V TLV431A; VKA = VREF, TA = -40°C to +125°C 3
Deviation of Reference Voltage Over Full Temperature Range (0 to +70°C) VREF(dev) 4 12 mV VKA = VREF, TA = 0 to +70°C 3
Deviation of Reference Voltage Over Full Temperature Range (-40°C to +85°C) VREF(dev) 6 20 mV VKA = VREF, TA = -40°C to +85°C 3
Deviation of Reference Voltage Over Full Temperature Range (-40°C to +125°C) VREF(dev) 11 31 mV VKA = VREF, TA = -40°C to +125°C 3
Ratio of Change in Reference Voltage to Change in Cathode Voltage (6 V) ΔVREF/ΔVKA -1.5 -2.7 mV/V VKA for VREF to 6V 3
Ratio of Change in Reference Voltage to Change in Cathode Voltage (18 V) ΔVREF/ΔVKA -1.5 -2.7 mV/V VKA for VREF to 18V 3
Reference Input Current IREF 0.15 0.5 µA R1 = 10kΩ, R2 = OC 3
IREF Deviation Over Full Temperature Range (0 to +70°C) IREF(dev) 0.05 0.3 µA R1 = 10kΩ, R2 = OC, TA = 0 to +70°C 3
IREF Deviation Over Full Temperature Range (-40°C to +85°C) IREF(dev) 0.1 0.4 µA R1 = 10kΩ, R2 = OC, TA = -40°C to +85°C 3
IREF Deviation Over Full Temperature Range (-40°C to +125°C) IREF(dev) 0.15 0.5 µA R1 = 10kΩ, R2 = OC, TA = -40°C to +125°C 3
Minimum Cathode Current for Regulation (0 to +70°C) IKMIN 55 80 µA VKA = VREF, TA = 0 to +70°C 3
Minimum Cathode Current for Regulation (-40°C to +85°C) IKMIN 55 80 µA VKA = VREF, TA = -40°C to +85°C 3
Minimum Cathode Current for Regulation (-40°C to +125°C) IKMIN 55 100 µA VKA = VREF, TA = -40°C to +125°C 3
Off-State Current IK(OFF) 0.001 0.1 µA VKA = 18V, VREF = 0 3
Dynamic Output Impedance ZKA 0.25 0.4 Ω VKA = VREF, f = <1kHz, IK = 0.1mA to 15mA 3
Cathode Voltage VKA 18 V 2
Cathode Current IKA 0.1 15 mA 2
Operating Ambient Temperature Range TA -40 125 °C 2
Cathode Voltage VKA 20 V 2
Continuous Cathode Current IKA -20 20 mA 2
Reference Input Current Range IREF -0.05 3 mA 2
ESD Susceptibility, Human Body Model HBM 4 kV 2
ESD Susceptibility, Machine Model MM 400 V 2
ESD Susceptibility, Charged Device Model CDM 1 kV 2
Operating Junction Temperature TJ -40 150 °C 2
Storage Temperature TSTG -65 150 °C 2
Package Thermal Resistance, Junction-to-Ambient (SOT23) θJA 380 °C/W TA = +25°C, TJ = +150°C 2
Package Power Dissipation (SOT23) PDIS 330 mW TA = +25°C, TJ = +150°C 2

CAD (KiCad official)

  • Symbol: TLV431AFTA
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tlv431afta-etched.step / tlv431afta-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv431afta.step / tlv431afta.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tlv431afta.step 59 KB You want the bare part, or you mark your own boards.
tlv431afta-etched.step 1.2 MB You want the part with TLV431AFTA already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 319 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (17 pp, sha256 bfc6983112ce20da, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF