TL084CDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OUT	output	Output of amplifier 1. Push-pull output with short-circuit protection; typical peak output voltage swing ±13.5 V at RL=10 kΩ and VCC=±15 V.
2	1IN-	input	Inverting input of amplifier 1. JFET-input stage with typical input bias current 30 pA and input resistance 10^12 Ω. Common-mode input voltage range ±11 V typ at VCC=±15 V.
3	1IN+	input	Non-inverting input of amplifier 1. JFET-input stage with typical input bias current 30 pA and input resistance 10^12 Ω. Common-mode input voltage range ±11 V typ at VCC=±15 V.
4	VCC+	power_in	Positive supply rail. Absolute max +18 V referenced to midpoint between VCC+ and VCC-. Typical supply current 1.4 mA per amplifier (5.6 mA total).
5	2IN+	input	Non-inverting input of amplifier 2. JFET-input stage with typical input bias current 30 pA and input resistance 10^12 Ω.
6	2IN-	input	Inverting input of amplifier 2. JFET-input stage with typical input bias current 30 pA and input resistance 10^12 Ω.
7	2OUT	output	Output of amplifier 2. Push-pull output with short-circuit protection; typical peak output voltage swing ±13.5 V at RL=10 kΩ and VCC=±15 V.
8	3OUT	output	Output of amplifier 3. Push-pull output with short-circuit protection; typical peak output voltage swing ±13.5 V at RL=10 kΩ and VCC=±15 V.
9	3IN-	input	Inverting input of amplifier 3. JFET-input stage with typical input bias current 30 pA and input resistance 10^12 Ω.
10	3IN+	input	Non-inverting input of amplifier 3. JFET-input stage with typical input bias current 30 pA and input resistance 10^12 Ω.
11	VCC-	power_in	Negative supply rail. Absolute max -18 V referenced to midpoint between VCC+ and VCC-. May be tied to GND for single-supply operation within the specified common-mode range.
12	4IN+	input	Non-inverting input of amplifier 4. JFET-input stage with typical input bias current 30 pA and input resistance 10^12 Ω.
13	4IN-	input	Inverting input of amplifier 4. JFET-input stage with typical input bias current 30 pA and input resistance 10^12 Ω.
14	4OUT	output	Output of amplifier 4. Push-pull output with short-circuit protection; typical peak output voltage swing ±13.5 V at RL=10 kΩ and VCC=±15 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-14
Category	Op-amp/Cmp
Pins	14

Ordering variants

Same part, different packaging or reel option.

TL084CDR
TL084CDRD
TL084CDRN
TL084CDRP
TL084CDRNS
TL084CDRPW
TL084CDRPWR
TL084CDRJ
TL084CDRFK

CAD (KiCad official)

Symbol: TL084CDR
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tl084cdr.step`	195 KB	You want the bare part, or you mark your own boards.
`tl084cdr-etched.step`	2.1 MB	You want the part with `TL084CDR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 520 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (42 pp, sha256 28f9415129f5dcd0, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF