component
SY8303AAIC
Public Made by Adomby adom
Silergy Corp DC-DC Converters, TSOT-23-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownSY8303AAIC
Silergy Corp · DC-DC Converters · TSOT-23-8
SY8303AAIC from Silergy Corp, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Output feedback pin. Connect to the center of the external output resistor divider to program VOUT = 0.6 * (1 + R1/R2). Internal reference is 0.6V (±1.5%). |
| 2 | FS | input | Switching frequency programming pin. Connect a resistor from this pin to ground; Fsw(kHz) = 1e5 / RFS(kΩ), giving a range of 500kHz to 2.5MHz (RFS = 40kΩ to 200kΩ). |
| 3 | GND | power_in | Device ground reference. Both GND pins (3 and 4) must be connected to the PCB ground plane. |
| 4 | GND | power_in | Device ground reference. Both GND pins (3 and 4) must be connected to the PCB ground plane. Pin 2 (per θJC note) is the case reference for thermal measurement; both GND pins carry return current. |
| 5 | IN | power_in | Power input pin. Operating range 4.5V to 40V (absolute max 40V vs GND). Decouple to GND with at least 4.7µF ceramic capacitor placed close to the pin. |
| 6 | LX | power_out | Switching node. Connect to one end of the external power inductor. Internal high-side (110 mΩ) and low-side (70 mΩ) FETs switch this node between IN and GND. |
| 7 | BS | power_in | Bootstrap pin for the internal high-side gate driver. Connect a 100nF ceramic capacitor between BS and LX. BS-LX absolute maximum is 4V. |
| 8 | EN | input | Enable control input. Pull high to turn on the regulator (VENH = 1.5V max threshold); pull low to shut down (VENL = 0.5V min threshold, IShdn ≈ 1µA). Do not float. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | TSOT-23-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
SY8303AAIC
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 4.5 | 40 | V | 4 | ||
| Quiescent Current | IQ | 19 | µA | IOUT=0, VFB=VREF×105% | 4 | ||
| Shutdown Current | ISHDN | 1 | 2 | µA | EN=0 | 4 | |
| Feedback Reference Voltage | VREF | 0.591 | 0.6 | 0.609 | V | 4 | |
| FB Input Current | IFB | -50 | 50 | nA | VFB=VCC | 4 | |
| Top FET RON | RDS(ON)1 | 110 | mΩ | 4 | |||
| Bottom FET RON | RDS(ON)2 | 70 | mΩ | 4 | |||
| Top FET Current Limit | ILIM,TOP | 4 | 6.8 | A | 4 | ||
| EN Low Threshold | VENL | 0.5 | V | 4 | |||
| EN High Threshold | VENH | 1.5 | V | 4 | |||
| Input UVLO Threshold | VUVLO | 4.35 | V | 4 | |||
| UVLO Hysteresis | VHYS | 0.3 | V | 4 | |||
| Oscillator Frequency Program Range | FOSC | 0.5 | 2.5 | MHz | RFS=40k~200k | 4 | |
| Oscillator Frequency Accuracy | 425 | 500 | 575 | kHz | RFS=200k | 4 | |
| Soft-start Time | tSS | 1 | ms | 4 | |||
| Min ON Time | 80 | ns | 4 | ||||
| Min OFF Time | 120 | ns | 4 | ||||
| Thermal Shutdown Temperature | TSD | 150 | °C | 4 | |||
| Thermal Shutdown Hysteresis | TSD,HYS | 15 | °C | 4 | |||
| Supply Input Voltage | 4.5 | 40 | V | 3 | |||
| IN to GND | -0.3 | 40 | V | 3 | |||
| LX, FB, EN, FS to GND | -0.3 | 40 | V | 3 | |||
| BS-LX | 4 | V | 3 | ||||
| Power Dissipation | PD | 2 | W | TA = 25°C, TSOT23-8 | 3 | ||
| Junction Temperature Range | 150 | °C | 3 | ||||
| Ambient Temperature Range | -40 | 105 | °C | 3 | |||
| Lead Temperature | 260 | °C | Soldering, 10 sec. | 3 | |||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Package Thermal Resistance junction-to-ambient | θ JA | 60.2 | °C/W | Note 2: natural convection, TA = 25°C, JEDEC 51-3 4-layer board | 3 | ||
| Package Thermal Resistance junction-to-case | θ JC | 11.2 | °C/W | Note 2: pin 2 of TSOT-23-8 is the case position for θJC measurement | 3 |
CAD (KiCad official)
- Symbol:
SY8303AAIC - Footprint:
Package_TO_SOT_SMD:SOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
sy8303aaic-etched.step/sy8303aaic-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sy8303aaic.step/sy8303aaic.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sy8303aaic.step |
123 KB | You want the bare part, or you mark your own boards. |
sy8303aaic-etched.step |
2.4 MB | You want the part with SY8303AAIC already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 575 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (6 pp, sha256
3a91281a9799f4d9, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).