SY7200AABC from Silergy Corp, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	LX	power_out	Switching node / inductor connection. The drain of the internal 200mΩ low-side N-channel power FET; connect the boost inductor between the IN supply and this pin, and connect the Schottky rectifier from LX to VOUT. Absolute maximum rating -0.3V to 33V (transient +36V<50ns, -3V<10ns).
2	GND	power_in	Device ground reference and return for the internal low-side power FET. Should tie to a solid ground plane; keep the input capacitor loop back to this pin as short as possible.
3	FB	input	Current-sense feedback input. Regulated internally to VREF=200mV (196-204mV). Connect a sense resistor R1 from FB to GND at the bottom of the LED string to program the LED current: ILED = 0.2V / R1. Absolute maximum 4V; input bias current ≤1µA.
4	EN/PWM	input	Enable and PWM dimming input. Drive high (VENH≥1.5V) to enable the converter, low (VENL≤0.4V) to shut down (ISHDN≈10µA). For PWM brightness dimming apply a 20kHz-1MHz square wave; the first pulse must be ≥200ns to turn on the IC. Absolute maximum 32V.
5	OVP	input	Open-LED over-voltage protection sense pin. Monitors the boost output; when VOVP exceeds the internal clamp threshold (typ. 30V, range 28-33V) switching is inhibited to protect the circuit if the LED string opens. Absolute maximum 36V. Typically tied to VOUT.
6	IN	power_in	Input supply pin. Accepts 2.8V to 30V; UVLO rises at ~2.55V with 0.1V hysteresis. Decouple to GND with a ≥4.7µF X7R (or better) ceramic capacitor placed close to the pin. Absolute maximum 32V.

Key specifications

Parameter	Value
Manufacturer	Silergy Corp
Package	SOT-23-6
Category	LED-drv
Pins	6

Ordering variants

Same part, different packaging or reel option.

SY7200AABC

CAD (KiCad official)

Symbol: SY7200AABC
Footprint: Package_TO_SOT_SMD:SOT-23-6
3D model: SOT-23-6 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sy7200aabc.step`	97 KB	You want the bare part, or you mark your own boards.
`sy7200aabc-etched.step`	2.0 MB	You want the part with `SY7200AABC` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 482 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Silergy Corp datasheet (9 pp, sha256 86fa6eccd7ef812c, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF