STM8S005K6T6C from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NRST	bidirectional	Active-low device reset input/output with internal pull-up. Drives low during internal reset generation.
2	PA1/OSCIN	bidirectional	Port A1 general-purpose I/O; alternate function is OSCIN, the crystal/resonator oscillator input.
3	PA2/OSCOUT	bidirectional	Port A2 general-purpose I/O; alternate function is OSCOUT, the crystal/resonator oscillator output.
4	VSS	power_in	Digital ground return. Connect to system ground with local decoupling.
5	VCAP	passive	1.8 V internal regulator stabilization capacitor. Connect an external ceramic capacitor (typ. 1 uF) between VCAP and VSS; do not power externally.
6	VDD	power_in	Digital core power supply, 2.95 V to 5.5 V. Decouple locally with 100 nF ceramic to VSS.
7	VDDIO	power_in	I/O power supply, 2.95 V to 5.5 V. Sets the logic level of digital I/O ports.
8	PF4/AIN12	bidirectional	Port F4 general-purpose I/O with weak pull-up during reset, floating after reset release; alternate function is ADC analog input channel 12 (not selectable in ADC scan mode or with analog watchdog).
9	VDDA	power_in	Analog power supply for ADC and internal reference. Tie to VDD through a filter (typ. ferrite + 100 nF + 1 uF).
10	VSSA	power_in	Analog ground for ADC. Tie to VSS at a single star point beneath the device.
11	PB5/AIN5/[I2C_SDA]	bidirectional	Port B5 general-purpose I/O; default alt is ADC analog input 5; remap alt is I2C data (AFR6). Selected by AFR6 option bit - mux review required.
12	PB4/AIN4/[I2C_SCL]	bidirectional	Port B4 general-purpose I/O; default alt is ADC analog input 4; remap alt is I2C clock (AFR6). Selected by AFR6 option bit - mux review required.
13	PB3/AIN3/[TIM1_ETR]	bidirectional	Port B3 general-purpose I/O; default alt is ADC analog input 3; remap alt is TIM1 external trigger input (AFR5).
14	PB2/AIN2/[TIM1_CH3N]	bidirectional	Port B2 general-purpose I/O; default alt is ADC analog input 2; remap alt is TIM1 complementary channel 3 output (AFR5).
15	PB1/AIN1/[TIM1_CH2N]	bidirectional	Port B1 general-purpose I/O; default alt is ADC analog input 1; remap alt is TIM1 complementary channel 2 output (AFR5).
16	PB0/AIN0/[TIM1_CH1N]	bidirectional	Port B0 general-purpose I/O; default alt is ADC analog input 0; remap alt is TIM1 complementary channel 1 output (AFR5).
17	PE5/SPI_NSS	bidirectional	Port E5 general-purpose I/O; alternate function is SPI slave-select (NSS).
18	PC1/TIM1_CH1/UART2_CK	bidirectional	Port C1 high-sink general-purpose I/O; alternate functions are TIM1 channel 1 and UART2 synchronous clock.
19	PC2/TIM1_CH2	bidirectional	Port C2 high-sink general-purpose I/O; alternate function is TIM1 channel 2.
20	PC3/TIM1_CH3	bidirectional	Port C3 high-sink general-purpose I/O; alternate function is TIM1 channel 3.
21	PC4/TIM1_CH4	bidirectional	Port C4 high-sink general-purpose I/O; alternate function is TIM1 channel 4.
22	PC5/SPI_SCK	bidirectional	Port C5 high-sink general-purpose I/O; alternate function is SPI serial clock.
23	PC6/SPI_MOSI	bidirectional	Port C6 high-sink general-purpose I/O; alternate function is SPI MOSI (master-out / slave-in).
24	PC7/SPI_MISO	bidirectional	Port C7 high-sink general-purpose I/O; alternate function is SPI MISO (master-in / slave-out).
25	PD0/TIM3_CH2/[TIM1_BKIN]/[CLK_CCO]	bidirectional	Port D0 high-sink general-purpose I/O; default alt is TIM3 channel 2; remap alts are TIM1 break input (AFR3) or configurable clock output CLK_CCO (AFR2).
26	PD1/SWIM	bidirectional	Port D1 high-sink general-purpose I/O; alternate function is the SWIM single-wire debug/programming interface. In pull-up during reset and after reset release.
27	PD2/TIM3_CH1/[TIM2_CH3]	bidirectional	Port D2 high-sink general-purpose I/O; default alt is TIM3 channel 1; remap alt is TIM2 channel 3 (AFR1).
28	PD3/TIM2_CH2/[ADC_ETR]	bidirectional	Port D3 high-sink general-purpose I/O; default alt is TIM2 channel 2; remap alt is ADC external trigger (AFR0).
29	PD4/TIM2_CH1/[BEEP]	bidirectional	Port D4 high-sink general-purpose I/O; default alt is TIM2 channel 1; remap alt is BEEP output (AFR7).
30	PD5/UART2_TX	bidirectional	Port D5 general-purpose I/O; alternate function is UART2 transmit data.
31	PD6/UART2_RX	bidirectional	Port D6 general-purpose I/O; alternate function is UART2 receive data.
32	PD7/TLI/[TIM1_CH4]	bidirectional	Port D7 general-purpose I/O; default alt is Top Level Interrupt (TLI); remap alt is TIM1 channel 4 (AFR4).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-32(7x7)
Category	MCU
Pins	32

Ordering variants

Same part, different packaging or reel option.

STM8S005K6T6C
STM8S005K6T6CC6T6C

CAD (KiCad official)

Symbol: STM8S005K6T6C
Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
3D model: LQFP-32(7x7) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`stm8s005k6t6c.step`	413 KB	You want the bare part, or you mark your own boards.
`stm8s005k6t6c-etched.step`	4.2 MB	You want the part with `STM8S005K6T6C` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1028 faces against 507 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (103 pp, sha256 83d0c5723566e2ea, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF