STM8S003F3P6TR
Public Unreviewedby Ray
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownSTM8S003F3P6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM8S003F3P6TR from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD4/BEEP/TIM2_CH1/UART1_CK | bidirectional | Port D bit 4. General-purpose high-sink I/O; default alt functions: BEEP output, TIM2 channel 1, or UART1 synchronous clock. 5 V tolerant, floating input at reset. |
| 2 | PD5/AIN5/UART1_TX | bidirectional | Port D bit 5. High-sink digital I/O, ADC analog input 5, or UART1 transmit data. Floating input at reset. |
| 3 | PD6/AIN6/UART1_RX | bidirectional | Port D bit 6. High-sink digital I/O, ADC analog input 6, or UART1 receive data. Floating input at reset. |
| 4 | NRST | bidirectional | Active-low bidirectional reset pin. Internal weak pull-up; asserted low resets the MCU and drives low during internal reset. |
| 5 | PA1/OSCIN | bidirectional | Port A bit 1 or external crystal/resonator input (OSCIN) for the HSE oscillator. In halt/active-halt mode PA1 is forced to weak pull-up input; use PA1 only as input if these modes are used. |
| 6 | PA2/OSCOUT | bidirectional | Port A bit 2 or external crystal/resonator output (OSCOUT) for the HSE oscillator. Standard-speed digital I/O (not high-sink). |
| 7 | VSS | power_in | Digital ground reference (0 V) for the MCU core and I/O. |
| 8 | VCAP | passive | Internal 1.8 V core-regulator decoupling capacitor pin. Requires an external ceramic capacitor to VSS (typ. 1 µF) per section 9.3.1; not to be driven externally. |
| 9 | VDD | power_in | Main digital power supply. Operating range 2.95 V to 5.5 V; decouple with a local ceramic capacitor to VSS. |
| 10 | PA3/TIM2_CH3/[SPI_NSS] | bidirectional | Port A bit 3. High-sink GPIO; default alt function TIM2 channel 3. When option bit AFR1 is set, SPI master/slave select (SPI_NSS) is remapped onto this pin. |
| 11 | PB5/I2C_SDA/[TIM1_BKIN] | bidirectional | Port B bit 5, default alt function I2C serial data (SDA). True open-drain output (no P-channel or protection diode to VDD); external pull-up required. AFR4 remaps TIM1_BKIN onto this pin. |
| 12 | PB4/I2C_SCL/[ADC_ETR] | bidirectional | Port B bit 4, default alt function I2C serial clock (SCL). True open-drain output (no P-channel/protection diode to VDD); external pull-up required. AFR4 remaps ADC external trigger (ADC_ETR) onto this pin. |
| 13 | PC3/TIM1_CH3/[TLI]/[TIM1_CH1N] | bidirectional | Port C bit 3 (high-sink). Default alt function TIM1 channel 3. AFR3 remaps this pin to the top-level interrupt (TLI); AFR7 remaps to TIM1 inverted channel 1 (TIM1_CH1N). |
| 14 | PC4/CLK_CCO/TIM1_CH4/AIN2/[TIM1_CH2N] | bidirectional | Port C bit 4 (high-sink). Default alt functions: configurable clock output (CCO), TIM1 channel 4, or ADC analog input 2. AFR7 remaps to TIM1 inverted channel 2 (TIM1_CH2N). |
| 15 | PC5/SPI_SCK/[TIM2_CH1] | bidirectional | Port C bit 5 (high-sink). Default alt function SPI serial clock (SCK). AFR0 remaps to TIM2 channel 1. |
| 16 | PC6/SPI_MOSI/[TIM1_CH1] | bidirectional | Port C bit 6 (high-sink). Default alt function SPI master-out/slave-in (MOSI). AFR0 remaps to TIM1 channel 1. |
| 17 | PC7/SPI_MISO/[TIM1_CH2] | bidirectional | Port C bit 7 (high-sink). Default alt function SPI master-in/slave-out (MISO). AFR0 remaps to TIM1 channel 2. |
| 18 | PD1/SWIM | bidirectional | Port D bit 1, default alt function Single-Wire Interface Module (SWIM) for programming and debug. In weak pull-up input during and after reset; fast (O4) push-pull output when driven. |
| 19 | PD2/AIN3/[TIM2_CH3] | bidirectional | Port D bit 2 (high-sink). Default alt function ADC analog input 3. AFR1 remaps TIM2 channel 3 onto this pin. |
| 20 | PD3/AIN4/TIM2_CH2/ADC_ETR | bidirectional | Port D bit 3 (high-sink). Default alt functions: ADC analog input 4, TIM2 channel 2, or ADC external trigger (ADC_ETR). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | MCU |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
STM8S003F3P6TRSTM8S003F3P6TRU6STM8S003F3P6TRU6TRSTM8S003F3P6TRT6STM8S003F3P6TRT6TR
CAD (KiCad official)
- Symbol:
STM8S003F3P6TR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
stm8s003f3p6tr.step |
267 KB | You want the bare part, or you mark your own boards. |
stm8s003f3p6tr-etched.step |
3.9 MB | You want the part with STM8S003F3P6TR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 936 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (104 pp, sha256
f22af8c2e2680b97, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).