STM8S003F3
Public Unreviewedby Ray
ST 8-bit STM8 value-line MCU, TSSOP-20. 16 MHz, 8 KB flash, 1 KB RAM, 128 B EEPROM. Ultra-low-cost. Datasheet-verified.
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markdownSTM8S003F3
STMicroelectronics · 8-bit STM8 MCU (value line) · TSSOP-20
ST's ultra-low-cost 8-bit microcontroller, an STM8 core in TSSOP-20 that shows up in countless price-sensitive gadgets. It runs at up to 16 MHz with 8 KB of flash, 1 KB of RAM, and 128 bytes of true data EEPROM (rated 100k write cycles), and brings out 16 GPIO plus a 10-bit ADC, three timers, and hardware UART, SPI, and I2C. It needs no external crystal (internal oscillator) and programs over the single-wire SWIM interface (pin 18). Pin-compatible with the STM8S103F3, it is the default choice when a design needs a real MCU for pennies. Datasheet-verified 20-pin pinout.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD4/BEEP/TIM2_CH1/UART1_CK | bidirectional | Port D bit 4. High-sink GPIO (fast/slow programmable, floating after reset). Muxed default alternate functions: TIM2 channel 1, BEEP output, and UART1 synchronous clock. |
| 2 | PD5/AIN5/UART1_TX | bidirectional | Port D bit 5. High-sink GPIO. Muxed with ADC analog input 5 and UART1 data transmit. |
| 3 | PD6/AIN6/UART1_RX | bidirectional | Port D bit 6. High-sink GPIO. Muxed with ADC analog input 6 and UART1 data receive. |
| 4 | NRST | bidirectional | Active-low bidirectional reset with integrated weak pull-up. Asserted low by the internal POR/BOR, watchdog or an external reset source; can also be driven low externally to reset the device. |
| 5 | PA1/OSCIN | bidirectional | Port A bit 1 (slow O1 output, floating after reset). Doubles as the HSE crystal/resonator input (OSCIN) or external clock input. |
| 6 | PA2/OSCOUT | bidirectional | Port A bit 2 (slow O1 output, floating after reset). Doubles as the HSE crystal/resonator output (OSCOUT). |
| 7 | VSS | power_in | Digital ground return for VDD. |
| 8 | VCAP | passive | Output of the internal 1.8 V core regulator. Requires an external stabilization capacitor to VSS (see Section 9.3.1 VCAP external capacitor). Do not drive externally. |
| 9 | VDD | power_in | Main digital power supply, 2.95 V to 5.5 V operating range. Decouple locally to VSS. |
| 10 | PA3/TIM2_CH3/[SPI_NSS] | bidirectional | Port A bit 3. High-sink GPIO. Default alternate function: TIM2 channel 3. When alternate-function remap bit AFR1 is programmed the pin instead becomes the SPI master/slave-select input (SPI_NSS). |
| 11 | PB5/I2C_SDA/[TIM1_BKIN] | bidirectional | Port B bit 5. True open-drain output (no P-buffer, no weak pull-up, no protection diode to VDD); an external pull-up is required. Default alternate function: I2C SDA data line. When AFR4 is programmed the pin becomes TIM1 break input (TIM1_BKIN). |
| 12 | PB4/I2C_SCL/[ADC_ETR] | bidirectional | Port B bit 4. True open-drain output (no P-buffer, no weak pull-up, no protection diode to VDD); external pull-up required. Default alternate function: I2C SCL clock. When AFR4 is programmed the pin becomes ADC external trigger (ADC_ETR). |
| 13 | PC3/TIM1_CH3/[TLI]/[TIM1_CH1N] | bidirectional | Port C bit 3. High-sink GPIO. Default alternate function: TIM1 channel 3. Remap options: top-level interrupt (TLI) via AFR3, or TIM1 complementary channel 1 (TIM1_CH1N) via AFR7. |
| 14 | PC4/CLK_CCO/TIM1_CH4/AIN2/[TIM1_CH2N] | bidirectional | Port C bit 4. High-sink GPIO. Default alternate functions: configurable clock output (CCO), TIM1 channel 4, and ADC analog input 2. When AFR7 is programmed the pin becomes TIM1 complementary channel 2 (TIM1_CH2N). |
| 15 | PC5/SPI_SCK/[TIM2_CH1] | bidirectional | Port C bit 5. High-sink GPIO. Default alternate function: SPI clock (SCK). When AFR0 is programmed the pin becomes TIM2 channel 1. |
| 16 | PC6/SPI_MOSI/[TIM1_CH1] | bidirectional | Port C bit 6. High-sink GPIO. Default alternate function: SPI master-out/slave-in (MOSI). When AFR0 is programmed the pin becomes TIM1 channel 1. |
| 17 | PC7/SPI_MISO/[TIM1_CH2] | bidirectional | Port C bit 7. High-sink GPIO. Default alternate function: SPI master-in/slave-out (MISO). When AFR0 is programmed the pin becomes TIM1 channel 2. |
| 18 | PD1/SWIM | bidirectional | Port D bit 1. High-sink GPIO with fast/slow programmability (O4). SWIM single-wire debug and in-circuit programming data pin. In input pull-up during reset phase and after internal reset release to allow SWIM entry. |
| 19 | PD2/AIN3/[TIM2_CH3] | bidirectional | Port D bit 2. High-sink GPIO. Default alternate function: ADC analog input 3. When AFR1 is programmed the pin becomes TIM2 channel 3. |
| 20 | PD3/AIN4/TIM2_CH2/ADC_ETR | bidirectional | Port D bit 3. High-sink GPIO. Default alternate functions: ADC analog input 4, TIM2 channel 2, and ADC external trigger (ADC_ETR). |
Key specifications
| Parameter | Value |
|---|---|
| Core | 8-bit STM8 |
| Max clock | 16 MHz |
| Flash | 8 KB |
| RAM | 1 KB |
| EEPROM | 128 B (100k cycles) |
| GPIO | 16 |
| ADC | 10-bit (5 ch) |
| Serial | UART + SPI + I2C |
| Supply voltage | 2.95-5.5 V |
| Package | TSSOP-20 |
Ordering variants
Same part, different packaging or reel option.
STM8S003F3P6 (TSSOP-20)STM8S003F3U6 (UFQFPN-20)
CAD (KiCad official)
- Symbol:
MCU_ST_STM8:STM8S003F3P - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (103 pp, sha256
1a0775fefcda1553, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).