STM32L011F4P6TR
Public Unreviewedby Ray
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownSTM32L011F4P6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM32L011F4P6TR from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9-BOOT0 | input | Boot mode selection input (BOOT0) shared with GPIO PB9. Sampled at reset to choose boot memory (main Flash vs system bootloader). Input-only after boot (type B). 5 V tolerant, FM+ capable when used as PB9. |
| 2 | PC14-OSC32_IN | bidirectional | GPIO PC14 muxed with LSE 32.768 kHz crystal oscillator input (OSC32_IN). Selected via RCC. 5 V tolerant (FT) I/O. |
| 3 | PC15-OSC32_OUT | bidirectional | GPIO PC15 muxed with LSE 32.768 kHz crystal oscillator output (OSC32_OUT). Standard 3.3 V I/O (TC). |
| 4 | NRST | bidirectional | Bidirectional device reset (active low) with embedded weak pull-up resistor. Drive low to force system reset; also driven low by internal reset sources. |
| 5 | VDDA | power_in | Analog power supply (1.65-3.6 V). Feeds ADC, comparators, internal reference and reset block. Must be tied to VDD potential; typically decoupled with 100 nF + bulk capacitance. |
| 6 | PA0-CK_IN | bidirectional | GPIO PA0 with wake-up input CK_IN. 3.3 V tolerant analog-capable I/O (TTa). Alt functions: USART2_RX, LPTIM1_IN1, TIM2_CH1, USART2_CTS, TIM2_ETR, LPUART1_RX, COMP1_OUT. Additional: COMP1_INM, ADC_IN0, RTC_TAMP2/WKUP1/CK_IN. |
| 7 | PA1 | bidirectional | GPIO PA1, 5 V tolerant (FT). Alt functions: EVENTOUT, LPTIM1_IN2, TIM2_CH2, I2C1_SMBA, USART2_RTS_DE, TIM21_ETR, LPUART1_TX. Additional analog: COMP1_INP, ADC_IN1. |
| 8 | PA2 | bidirectional | GPIO PA2, 3.3 V tolerant analog-capable (TTa). Alt functions: TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX, COMP2_OUT. Additional: COMP2_INM, ADC_IN2, RTC_TAMP3/RTC_TS/RTC_OUT/WKUP3. |
| 9 | PA3 | bidirectional | GPIO PA3, 5 V tolerant (FT). Alt functions: TIM21_CH2, TIM2_CH4, USART2_RX, LPUART1_RX. Additional analog: COMP2_INP, ADC_IN3. |
| 10 | PA4 | bidirectional | GPIO PA4, 3.3 V tolerant analog-capable (TTa). Alt functions: SPI1_NSS, LPTIM1_IN1, LPTIM1_ETR, I2C1_SCL, USART2_CK, TIM2_ETR, LPUART1_TX, COMP2_OUT. Additional: COMP1_INM, COMP2_INM, ADC_IN4. |
| 11 | PA5 | bidirectional | GPIO PA5, 3.3 V tolerant analog-capable (TTa). Alt functions: SPI1_SCK, LPTIM1_IN2, TIM2_ETR, TIM2_CH1. Additional analog: COMP1_INM, COMP2_INM, ADC_IN5. |
| 12 | PA6 | bidirectional | GPIO PA6, 5 V tolerant (FT). Alt functions: SPI1_MISO, LPTIM1_ETR, LPUART1_CTS, EVENTOUT, COMP1_OUT. Additional analog: ADC_IN6. |
| 13 | PA7 | bidirectional | GPIO PA7, 5 V tolerant (FT). Alt functions: SPI1_MOSI, LPTIM1_OUT, USART2_CTS, TIM21_ETR, EVENTOUT, COMP2_OUT. Additional analog: COMP2_INP, ADC_IN7. |
| 14 | PB1 | bidirectional | GPIO PB1, 5 V tolerant (FT). Alt functions: USART2_CK, SPI1_MOSI, LPTIM1_IN1, LPUART1_RTS_DE, TIM2_CH4. Additional analog: ADC_IN9, VREF_OUT. |
| 15 | VSS | power_in | Digital and analog ground return. Tie directly to system ground plane together with pin 16 VDD's decoupling network. |
| 16 | VDD | power_in | Digital power supply, 1.65-3.6 V. Decouple with 100 nF close to the pin plus 1-4.7 µF bulk. VDDA must be tied to the same rail. |
| 17 | PA9 | bidirectional | GPIO PA9, 5 V tolerant FM+ capable (FTf). Alt functions: MCO, I2C1_SCL, LPTIM1_OUT, USART2_TX, TIM21_CH2, COMP1_OUT. |
| 18 | PA10 | bidirectional | GPIO PA10, 5 V tolerant FM+ capable (FTf). Alt functions: TIM21_CH1, I2C1_SDA, RTC_REFIN, USART2_RX, TIM2_CH3, COMP1_OUT. |
| 19 | PA13 | bidirectional | GPIO PA13 doubling as SWDIO debug pin (default after reset). 5 V tolerant FM+ capable (FTf). Alt functions: SWDIO, LPTIM1_ETR, I2C1_SDA, SPI1_SCK, LPUART1_RX, COMP1_OUT. |
| 20 | PA14 | bidirectional | GPIO PA14 doubling as SWCLK debug pin (default after reset). 5 V tolerant (FT). Alt functions: SWCLK, LPTIM1_OUT, I2C1_SMBA, USART2_TX, SPI1_MISO, LPUART1_TX, COMP2_OUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | MCU |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
STM32L011F4P6TRSTM32L011F4P6TRF3P6STM32L011F4P6TRF3P6TRSTM32L011F4P6TRD4P6STM32L011F4P6TRD4P6TRSTM32L011F4P6TRD3P6STM32L011F4P6TRD3P6TRSTM32L011F4P6TRG4U6STM32L011F4P6TRG4U6TRSTM32L011F4P6TRG3U6STM32L011F4P6TRG3U6TRSTM32L011F4P6TRK4T6STM32L011F4P6TRK4T6TRSTM32L011F4P6TRK3T6STM32L011F4P6TRK3T6TRSTM32L011F4P6TRE4Y6STM32L011F4P6TRE4Y6TRSTM32L011F4P6TRE3Y6STM32L011F4P6TRE3Y6TR
CAD (KiCad official)
- Symbol:
STM32L011F4P6TR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
stm32l011f4p6tr.step |
267 KB | You want the bare part, or you mark your own boards. |
stm32l011f4p6tr-etched.step |
3.3 MB | You want the part with STM32L011F4P6TR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 834 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (119 pp, sha256
1271aa38a181c7a2, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).