STM32L011F4P6
Public Unreviewedby Ray
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownSTM32L011F4P6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM32L011F4P6 from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9/BOOT0 | input | Boot-mode select input (B-type). After reset acts as BOOT0; system boots from user Flash, system memory, or SRAM depending on BOOT0 level sampled at reset. Also available as PB9 GPIO after reset if BOOT0 remapped via option bytes. |
| 2 | PC14-OSC32_IN | bidirectional | 5V-tolerant I/O (FT). Additional function: LSE 32.768 kHz crystal oscillator input (OSC32_IN). Doubles as PC14 GPIO when LSE not used. |
| 3 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V I/O (TC). Additional function: LSE 32.768 kHz crystal oscillator output (OSC32_OUT). Doubles as PC15 GPIO when LSE not used. |
| 4 | NRST | bidirectional | Device reset input, active low, with internal weak pull-up (RST type). Also driven low internally to signal an internal reset source. Pull externally low >20 us to force reset. |
| 5 | VDDA | power_in | Analog supply for ADC, comparators, reset block, PLL, and internal voltage reference. Must equal or exceed VDD; range 1.65 V-3.6 V. Decouple to VSS with 100 nF + 1 uF close to the pin. |
| 6 | PA0-CK_IN | bidirectional | 3.3 V ADC-tolerant I/O (TTa). Alt functions: USART2_RX/CTS, LPTIM1_IN1, TIM2_CH1/ETR, LPUART1_RX, COMP1_OUT. Additional: COMP1_INM, ADC_IN0, RTC_TAMP2/WKUP1, CK_IN (external clock in). |
| 7 | PA1 | bidirectional | 5V-tolerant I/O (FT). Alt functions: EVENTOUT, LPTIM1_IN2, TIM2_CH2, I2C1_SMBA, USART2_RTS, TIM21_ETR, LPUART1_TX. Additional: COMP1_INP, ADC_IN1. |
| 8 | PA2 | bidirectional | 3.3 V ADC-tolerant I/O (TTa). Alt functions: TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX, COMP2_OUT. Additional: COMP2_INM, ADC_IN2, RTC_TAMP3/RTC_TS/RTC_OUT/WKUP3. |
| 9 | PA3 | bidirectional | 5V-tolerant I/O (FT). Alt functions: TIM21_CH2, TIM2_CH4, USART2_RX, LPUART1_RX. Additional: COMP2_INP, ADC_IN3. |
| 10 | PA4 | bidirectional | 3.3 V ADC-tolerant I/O (TTa). Alt functions: SPI1_NSS, LPTIM1_IN1/ETR, I2C1_SCL, USART2_CK, TIM2_ETR, LPUART1_TX, COMP2_OUT. Additional: COMP1_INM, COMP2_INM, ADC_IN4. |
| 11 | PA5 | bidirectional | 3.3 V ADC-tolerant I/O (TTa). Alt functions: SPI1_SCK, LPTIM1_IN2, TIM2_ETR, TIM2_CH1. Additional: COMP1_INM, COMP2_INM, ADC_IN5. |
| 12 | PA6 | bidirectional | 5V-tolerant I/O (FT). Alt functions: SPI1_MISO, LPTIM1_ETR, LPUART1_CTS, EVENTOUT, COMP1_OUT. Additional: ADC_IN6. |
| 13 | PA7 | bidirectional | 5V-tolerant I/O (FT). Alt functions: SPI1_MOSI, LPTIM1_OUT, USART2_CTS, TIM21_ETR, EVENTOUT, COMP2_OUT. Additional: COMP2_INP, ADC_IN7. |
| 14 | PB1 | bidirectional | 5V-tolerant I/O (FT). Alt functions: USART2_CK, SPI1_MOSI, LPTIM1_IN1, LPUART1_RTS, TIM2_CH4. Additional: ADC_IN9, VREF_OUT. |
| 15 | VSS | power_in | Digital and analog ground reference (0 V). Tie to system ground plane; footnote 5 confirms this pin serves both digital and analog return. |
| 16 | VDD | power_in | Main digital supply, 1.65 V-3.6 V. Powers I/Os and internal regulator. Decouple to VSS with 100 nF close to the pin. |
| 17 | PA9 | bidirectional | 5V-tolerant Fm+ I/O (FTf). Alt functions: MCO clock output, I2C1_SCL, LPTIM1_OUT, USART2_TX, TIM21_CH2, COMP1_OUT. |
| 18 | PA10 | bidirectional | 5V-tolerant Fm+ I/O (FTf). Alt functions: TIM21_CH1, I2C1_SDA, RTC_REFIN, USART2_RX, TIM2_CH3, COMP1_OUT. |
| 19 | PA13 | bidirectional | 5V-tolerant Fm+ I/O (FTf). Default after reset: SWDIO (serial-wire debug data). Alt functions: SWDIO, LPTIM1_ETR, I2C1_SDA, SPI1_SCK, LPUART1_RX, COMP1_OUT. |
| 20 | PA14 | bidirectional | 5V-tolerant I/O (FT). Default after reset: SWCLK (serial-wire debug clock). Alt functions: SWCLK, LPTIM1_OUT, I2C1_SMBA, USART2_TX, SPI1_MISO, LPUART1_TX, COMP2_OUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | MCU |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
STM32L011F4P6STM32L011F4P6F3P6STM32L011F4P6G4U6STM32L011F4P6G3U6STM32L011F4P6D4P6STM32L011F4P6D3P6STM32L011F4P6E4U6STM32L011F4P6E3U6STM32L011F4P6K4U6STM32L011F4P6K3U6STM32L011F4P6K4T6STM32L011F4P6K3T6STM32L011F4P6E4Y6STM32L011F4P6E3Y6
CAD (KiCad official)
- Symbol:
STM32L011F4P6 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
stm32l011f4p6.step |
267 KB | You want the bare part, or you mark your own boards. |
stm32l011f4p6-etched.step |
3.0 MB | You want the part with STM32L011F4P6 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 765 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (115 pp, sha256
d598d4dcb828e7dc, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).