STM32G071C8T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PC13	bidirectional	Port C bit 13. 5 V-tolerant general-purpose I/O; can serve as RTC tamper/timestamp, WKUP2, LSCO, or EXTI13.
2	PC14-OSC32_IN	bidirectional	Port C bit 14 / LSE 32.768 kHz crystal input. Default OSC32_IN function; usable as GPIO when the LSE oscillator is not enabled.
3	PC15-OSC32_OUT	bidirectional	Port C bit 15 / LSE 32.768 kHz crystal output. Default OSC32_OUT; usable as GPIO when LSE is disabled.
4	VBAT	power_in	Backup supply for RTC, LSE oscillator, and backup registers when VDD is absent. Connect to a battery or to VDD if backup domain not used; 1.55-3.6 V.
5	VREF+	power_in	Positive reference voltage for the ADC and DAC. Range VREF+ ≥ 1.62 V and ≤ VDDA; must be decoupled to VSSA.
6	VDD/VDDA	power_in	Combined digital (VDD) and analog (VDDA) supply, 1.7-3.6 V. On LQFP48 the VDDA and VDD rails are bonded to a single pin; decouple with 100 nF + bulk cap to VSS/VSSA.
7	VSS/VSSA	power_in	Combined digital (VSS) and analog (VSSA) ground return, bonded to a single pin on LQFP48.
8	PF0-OSC_IN	bidirectional	Port F bit 0 / HSE crystal input. Default OSC_IN for 4-48 MHz external crystal or clock input; usable as GPIO when HSE disabled.
9	PF1-OSC_OUT	bidirectional	Port F bit 1 / HSE crystal output. Default OSC_OUT; usable as GPIO when HSE disabled.
10	PF2-NRST	bidirectional	Active-low system reset input/open-drain output. Internal pull-up ~40 kΩ; also selectable as PF2 GPIO by option byte.
11	PA0	bidirectional	Port A bit 0. 5 V-tolerant GPIO; ADC IN0, WKUP1, TIM2_CH1/ETR, USART2_CTS/RX, TIM15_CH1N, COMP1_INM alt functions.
12	PA1	bidirectional	Port A bit 1. 5 V-tolerant GPIO; ADC IN1, TIM2_CH2, TIM15_CH1N, USART2_DE/RTS, EVENTOUT, COMP1_INP.
13	PA2	bidirectional	Port A bit 2. 5 V-tolerant GPIO; ADC IN2, TIM2_CH3, USART2_TX, TIM15_CH1, COMP2_INM, LPUART1_TX.
14	PA3	bidirectional	Port A bit 3. 5 V-tolerant GPIO; ADC IN3, TIM2_CH4, USART2_RX, TIM15_CH2, LPUART1_RX.
15	PA4	bidirectional	Port A bit 4. GPIO with analog capability; ADC IN4, DAC_OUT1, SPI1_NSS, TIM14_CH1, EVENTOUT.
16	PA5	bidirectional	Port A bit 5. GPIO with analog capability; ADC IN5, DAC_OUT2, SPI1_SCK, TIM2_CH1/ETR, LPTIM2_ETR.
17	PA6	bidirectional	Port A bit 6. GPIO; ADC IN6, SPI1_MISO, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT.
18	PA7	bidirectional	Port A bit 7. GPIO; ADC IN7, SPI1_MOSI, TIM3_CH2, TIM1_CH1N, TIM17_CH1, COMP2_OUT.
19	PB0	bidirectional	Port B bit 0. GPIO; ADC IN8, TIM3_CH3, TIM1_CH2N, SPI1_NSS, USART3_CK.
20	PB1	bidirectional	Port B bit 1. GPIO; ADC IN9, TIM3_CH4, TIM1_CH3N, TIM14_CH1, LPUART1_RTS_DE.
21	PB2	bidirectional	Port B bit 2. 5 V-tolerant GPIO; LPTIM1_OUT, I2C3_SMBA, SPI2_MISO, USART3_TX alt functions.
22	PB10	bidirectional	Port B bit 10. 5 V-tolerant GPIO; I2C2_SCL, SPI2_SCK, USART3_TX, TIM2_CH3, LPUART1_RX.
23	PB11	bidirectional	Port B bit 11. 5 V-tolerant GPIO; I2C2_SDA, USART3_RX, TIM2_CH4, LPUART1_TX, EVENTOUT.
24	PB12	bidirectional	Port B bit 12. 5 V-tolerant GPIO; SPI2_NSS, TIM1_BKIN, USART3_CK, I2C2_SMBA, LPUART1_RX.
25	PB13	bidirectional	Port B bit 13. 5 V-tolerant GPIO; SPI2_SCK, TIM1_CH1N, I2C2_SCL, LPUART1_CTS.
26	PB14	bidirectional	Port B bit 14. 5 V-tolerant GPIO; SPI2_MISO, TIM1_CH2N, TIM15_CH1, LPUART1_DE_RTS.
27	PB15	bidirectional	Port B bit 15. 5 V-tolerant GPIO; SPI2_MOSI, TIM1_CH3N, TIM15_CH2, RTC_REFIN.
28	PA8	bidirectional	Port A bit 8. 5 V-tolerant GPIO; MCO, TIM1_CH1, USART1_CK, I2C3_SCL, SPI2_NSS.
29	PA9	bidirectional	Port A bit 9. 5 V-tolerant GPIO; USART1_TX, I2C1_SCL, TIM1_CH2, SPI2_MISO, MCO.
30	PC6	bidirectional	Port C bit 6. 5 V-tolerant GPIO; TIM3_CH1 alternate function.
31	PC7	bidirectional	Port C bit 7. 5 V-tolerant GPIO; TIM3_CH2 alternate function.
32	PA10	bidirectional	Port A bit 10. 5 V-tolerant GPIO; USART1_RX, I2C1_SDA, TIM1_CH3, TIM17_BKIN.
33	PA11 [PA9]	bidirectional	Port A bit 11, remappable to PA9 via SYSCFG. USART1_CTS, TIM1_CH4, I2C2_SCL, SPI1_MISO, UCPD1_CC1.
34	PA12 [PA10]	bidirectional	Port A bit 12, remappable to PA10 via SYSCFG. USART1_DE_RTS, TIM1_ETR, I2C2_SDA, SPI1_MOSI, UCPD2_CC1.
35	PA13	bidirectional	Port A bit 13 / SWDIO. Default serial-wire debug data I/O after reset; usable as GPIO/alt-function once SWD is disabled.
36	PA14-BOOT0	bidirectional	Port A bit 14 / SWCLK / BOOT0. Serial-wire debug clock and sampled at reset as BOOT0 to select the boot source; usable as GPIO afterwards.
37	PB3	bidirectional	Port B bit 3. 5 V-tolerant GPIO; SPI1_SCK, USART1_RTS_DE, TIM1_CH2, EVENTOUT.
38	PB4	bidirectional	Port B bit 4. 5 V-tolerant GPIO; SPI1_MISO, USART1_CTS, TIM3_CH1, TIM17_BKIN.
39	PB5	bidirectional	Port B bit 5. 5 V-tolerant GPIO; SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2, TIM16_BKIN.
40	PB6	bidirectional	Port B bit 6. 5 V-tolerant GPIO; I2C1_SCL, USART1_TX, LPTIM1_ETR, TIM1_CH3, SPI2_MISO.
41	PB7	bidirectional	Port B bit 7. 5 V-tolerant GPIO; I2C1_SDA, USART1_RX, LPTIM1_IN2, SPI2_MOSI.
42	PB8	bidirectional	Port B bit 8. 5 V-tolerant GPIO; I2C1_SCL, SPI2_SCK, USART3_RX, TIM16_CH1, HDMI_CEC.
43	PB9	bidirectional	Port B bit 9. 5 V-tolerant GPIO; I2C1_SDA, TIM17_CH1, IR_OUT, SPI2_NSS, EVENTOUT.
44	PD0	bidirectional	Port D bit 0. 5 V-tolerant GPIO; SPI2_NSS, TIM16_BKIN alt functions.
45	PD1	bidirectional	Port D bit 1. 5 V-tolerant GPIO; SPI2_SCK, TIM17_BKIN alt functions.
46	PD2	bidirectional	Port D bit 2. 5 V-tolerant GPIO; LPUART1_RTS_DE, TIM3_ETR alt functions.
47	PD3	bidirectional	Port D bit 3. 5 V-tolerant GPIO; USART2_CTS, LPUART1_CTS alt functions.
48	PA15	bidirectional	Port A bit 15. 5 V-tolerant GPIO; SPI1_NSS, USART2_RX, TIM2_CH1/ETR, EVENTOUT.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-48(7x7)
Category	MCU
Pins	48

Ordering variants

Same part, different packaging or reel option.

STM32G071C8T6
STM32G071C8T6CBT6
STM32G071C8T6C8U6
STM32G071C8T6CBU6
STM32G071C8T6R8T6
STM32G071C8T6RBT6
STM32G071C8T6R8I6
STM32G071C8T6RBI6
STM32G071C8T6K8T6
STM32G071C8T6KBT6
STM32G071C8T6K8U6
STM32G071C8T6KBU6
STM32G071C8T6G8U6
STM32G071C8T6GBU6
STM32G071C8T6EBY6

CAD (KiCad official)

Symbol: STM32G071C8T6
Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
3D model: LQFP-48(7x7) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`stm32g071c8t6.step`	617 KB	You want the bare part, or you mark your own boards.
`stm32g071c8t6-etched.step`	4.8 MB	You want the part with `STM32G071C8T6` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1189 faces against 747 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (133 pp, sha256 96d7e9ca1500e794, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF