STM32G070CBT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PC13	bidirectional	General-purpose I/O port C bit 13. FT (5 V tolerant). Alternate: TIM1_BKIN. Additional: TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. Supplied through RTC/backup power switch - limited output drive.
2	PC14-OSC32_IN	bidirectional	GPIO PC14, doubles as LSE 32.768 kHz oscillator input (OSC32_IN). FT structure. Alternate: TIM1_BKIN2.
3	PC15-OSC32_OUT	bidirectional	GPIO PC15, doubles as LSE 32.768 kHz oscillator output (OSC32_OUT). FT structure. Alternate: OSC32_EN, OSC_EN, TIM15_BKIN.
4	VBAT	power_in	Backup battery supply for RTC and backup registers. Powers the RTC domain when VDD is absent.
5	VREF+	power_in	Positive external reference voltage for the ADC. Range typically 2.0 V to VDDA.
6	VDD/VDDA	power_in	Main digital and analog supply, 2.0 V to 3.6 V. VDD and VDDA are bonded to a single pin in LQFP48.
7	VSS/VSSA	power_in	Common ground for digital and analog domains (VSS and VSSA bonded).
8	PF0-OSC_IN	bidirectional	GPIO PF0, doubles as HSE crystal/resonator input (OSC_IN). FT structure. Alternate: TIM14_CH1.
9	PF1-OSC_OUT	bidirectional	GPIO PF1, doubles as HSE crystal output (OSC_OUT). FT structure. Alternate: OSC_EN, TIM15_CH1N.
10	NRST	bidirectional	Bidirectional device reset, active-low, with embedded weak pull-up (~40 kΩ). Drive low >20 µs to reset. Filtered.
11	PA0	bidirectional	GPIO PA0, 5 V tolerant with analog switch. Alt: SPI2_SCK, USART2_CTS, USART4_TX. Additional: ADC_IN0, TAMP_IN2, WKUP1.
12	PA1	bidirectional	GPIO PA1, FT_a. Alt: SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, USART4_RX, TIM15_CH1N, I2C1_SMBA, EVENTOUT. Additional: ADC_IN1.
13	PA2	bidirectional	GPIO PA2, FT_a. Alt: SPI1_MOSI/I2S1_SD, USART2_TX, TIM15_CH1. Additional: ADC_IN2, WKUP4, LSCO.
14	PA3	bidirectional	GPIO PA3, FT_a. Alt: SPI2_MISO, USART2_RX, TIM15_CH2, EVENTOUT. Additional: ADC_IN3.
15	PA4	bidirectional	GPIO PA4, TT_a (3.6 V tolerant with analog switch). Alt: SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, EVENTOUT. Additional: ADC_IN4, RTC_OUT2.
16	PA5	bidirectional	GPIO PA5, TT_a. Alt: SPI1_SCK/I2S1_CK, USART3_TX, EVENTOUT. Additional: ADC_IN5.
17	PA6	bidirectional	GPIO PA6, FT_a. Alt: SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, USART3_CTS, TIM16_CH1. Additional: ADC_IN6.
18	PA7	bidirectional	GPIO PA7, FT_a. Alt: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1. Additional: ADC_IN7.
19	PB0	bidirectional	GPIO PB0, FT_a. Alt: SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, USART3_RX. Additional: ADC_IN8. May have a reset-time pull-down (see UCPDx_STROBE).
20	PB1	bidirectional	GPIO PB1, FT_a. Alt: TIM14_CH1, TIM3_CH4, TIM1_CH3N, USART3_RTS_DE_CK, EVENTOUT. Additional: ADC_IN9.
21	PB2	bidirectional	GPIO PB2, FT_a. Alt: SPI2_MISO, USART3_TX, EVENTOUT. Additional: ADC_IN10.
22	PB10	bidirectional	GPIO PB10, FT_fa (Fast-mode Plus I2C capable, analog switch). Alt: USART3_TX, SPI2_SCK, I2C2_SCL. Additional: ADC_IN11.
23	PB11	bidirectional	GPIO PB11, FT_fa. Alt: SPI2_MOSI, USART3_RX, I2C2_SDA. Additional: ADC_IN15.
24	PB12	bidirectional	GPIO PB12, FT_a. Alt: SPI2_NSS, TIM1_BKIN, TIM15_BKIN, EVENTOUT. Additional: ADC_IN16.
25	PB13	bidirectional	GPIO PB13, FT_f (Fm+ capable). Alt: SPI2_SCK, TIM1_CH1N, USART3_CTS, TIM15_CH1N, I2C2_SCL, EVENTOUT.
26	PB14	bidirectional	GPIO PB14, FT_f. Alt: SPI2_MISO, TIM1_CH2N, USART3_RTS_DE_CK, TIM15_CH1, I2C2_SDA, EVENTOUT.
27	PB15	bidirectional	GPIO PB15, FT_c (specific electrical characteristics). Alt: SPI2_MOSI, TIM1_CH3N, TIM15_CH1N, TIM15_CH2, EVENTOUT. Additional: RTC_REFIN.
28	PA8	bidirectional	GPIO PA8, FT_c. Alt: MCO (main clock output), SPI2_NSS, TIM1_CH1, EVENTOUT. May have a reset-time pull-down.
29	PA9	bidirectional	GPIO PA9, FT_fd. Alt: MCO, USART1_TX, TIM1_CH2, SPI2_MISO, TIM15_BKIN, I2C1_SCL, EVENTOUT. May have reset-time pull-down.
30	PC6	bidirectional	GPIO PC6, FT. Alt: TIM3_CH1. May have reset-time pull-down.
31	PC7	bidirectional	GPIO PC7, FT. Alt: TIM3_CH2.
32	PA10	bidirectional	GPIO PA10, FT_fd. Alt: SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN, I2C1_SDA, EVENTOUT. May have reset-time pull-down.
33	PA11 [PA9]	bidirectional	GPIO PA11 (remappable to PA9 via SYSCFG_CFGR1). FT_f. Alt: SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL.
34	PA12 [PA10]	bidirectional	GPIO PA12 (remappable to PA10 via SYSCFG_CFGR1). FT_f. Alt: SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA.
35	PA13	bidirectional	GPIO PA13, FT. Default after reset: SWDIO (Serial Wire Debug data) with internal pull-up. Alt: IR_OUT, EVENTOUT.
36	PA14-BOOT0	bidirectional	GPIO PA14, FT. Default after reset: SWCLK (Serial Wire Debug clock) with internal pull-down. Also BOOT0 selection input at reset. Alt: USART2_TX, EVENTOUT.
37	PA15	bidirectional	GPIO PA15, FT. Alt: SPI1_NSS/I2S1_WS, USART2_RX, USART4_RTS_DE_CK, USART3_RTS_DE_CK, EVENTOUT.
38	PD0	bidirectional	GPIO PD0, FT_c. Alt: EVENTOUT, SPI2_NSS, TIM16_CH1. May have reset-time pull-down.
39	PD1	bidirectional	GPIO PD1, FT_d. Alt: EVENTOUT, SPI2_SCK, TIM17_CH1. May have reset-time pull-down.
40	PD2	bidirectional	GPIO PD2, FT_c. Alt: USART3_RTS_DE_CK, TIM3_ETR, TIM1_CH1N. May have reset-time pull-down.
41	PD3	bidirectional	GPIO PD3, FT_d. Alt: USART2_CTS, SPI2_MISO, TIM1_CH2N. May have reset-time pull-down.
42	PB3	bidirectional	GPIO PB3, FT_a. Alt: SPI1_SCK/I2S1_CK, TIM1_CH2, USART1_RTS_DE_CK, EVENTOUT.
43	PB4	bidirectional	GPIO PB4, FT_a. Alt: SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT.
44	PB5	bidirectional	GPIO PB5, FT. Alt: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, I2C1_SMBA. Additional: WKUP6.
45	PB6	bidirectional	GPIO PB6, FT_fa (Fm+ I2C). Alt: USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, I2C1_SCL, EVENTOUT.
46	PB7	bidirectional	GPIO PB7, FT_fa. Alt: USART1_RX, SPI2_MOSI, TIM17_CH1N, USART4_CTS, I2C1_SDA, EVENTOUT.
47	PB8	bidirectional	GPIO PB8, FT_f. Alt: SPI2_SCK, TIM16_CH1, USART3_TX, TIM15_BKIN, I2C1_SCL, EVENTOUT.
48	PB9	bidirectional	GPIO PB9, FT_f. Alt: IR_OUT, TIM17_CH1, USART3_RX, SPI2_NSS, I2C1_SDA, EVENTOUT.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-48(7x7)
Category	MCU
Pins	48

Ordering variants

Same part, different packaging or reel option.

STM32G070CBT6
STM32G070CBT6TR
STM32G070CBT6KBT6
STM32G070CBT6RBT6

CAD (KiCad official)

Symbol: STM32G070CBT6
Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
3D model: LQFP-48(7x7) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`stm32g070cbt6.step`	617 KB	You want the bare part, or you mark your own boards.
`stm32g070cbt6-etched.step`	4.9 MB	You want the part with `STM32G070CBT6` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1205 faces against 747 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (93 pp, sha256 29c4b367c493f973, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF