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STM32F030C8

STMicroelectronics · 32-bit Arm Cortex-M0 MCU · LQFP-48

The value-line member of ST's STM32F0 family, a 32-bit Arm Cortex-M0 microcontroller in LQFP-48 that undercuts most 8-bit parts on price while giving you a real 32-bit core. It runs at up to 48 MHz with 64 KB of flash and 8 KB of SRAM, and the 48-pin package brings out up to 39 GPIO across ports A/B/C/D/F, a 12-bit ADC, timers with PWM, and hardware USART, SPI, and I2C. It boots from an internal 8 MHz oscillator (no crystal required) and programs over SWD (SWDIO/SWCLK on PA13/PA14). A common jump from the STM8 or an 8-bit AVR when a project needs more headroom. Datasheet-verified 48-pin pinout.

Pinout

Pin Name Type Function
1 VDD power_in Digital / complementary power supply pin. Operating range 2.4 V-3.6 V. Decouple with 100 nF + shared 4.7 µF on the VDD/VSS pair.
2 PC13 bidirectional General-purpose I/O (TC, standard 3.3 V). Additional functions: RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2. Powered through the LSE/RTC power switch - limit output speed to 2 MHz / 30 pF and do not use as a current source.
3 PC14/OSC32_IN bidirectional General-purpose I/O (TC) that alternately serves as the OSC32_IN pin for the LSE (32.768 kHz) crystal. Same 3 mA supply-switch limit as PC13.
4 PC15/OSC32_OUT bidirectional General-purpose I/O (TC) that alternately serves as the OSC32_OUT pin for the LSE (32.768 kHz) crystal. Same 3 mA supply-switch limit as PC13.
5 PF0/OSC_IN bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate functions: I2C1_SDA. Additional function: OSC_IN (HSE crystal input, 4-32 MHz).
6 PF1/OSC_OUT bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate functions: I2C1_SCL. Additional function: OSC_OUT (HSE crystal output).
7 NRST bidirectional Device reset input / internal reset output, active low. Has an embedded weak pull-up (RST structure).
8 VSSA power_in Analog ground reference for the ADC and other analog blocks. Star-tie to digital VSS at the device.
9 VDDA power_in Analog power supply (2.4 V-3.6 V, must be ≥ VDD − 0.4 V). Decouple with 10 nF + 1 µF between VDDA and VSSA.
10 PA0 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: USART1_CTS / USART2_CTS / USART4_TX. Additional: ADC_IN0, RTC_TAMP2, WKUP1.
11 PA1 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: EVENTOUT / USART1_RTS / USART2_RTS / USART4_RX / TIM15_CH1N. Additional: ADC_IN1.
12 PA2 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: USART1_TX / USART2_TX / TIM15_CH1. Additional: ADC_IN2, WKUP4.
13 PA3 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: USART1_RX / USART2_RX / TIM15_CH2. Additional: ADC_IN3.
14 PA4 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: SPI1_NSS / USART1_CK / USART2_CK / TIM14_CH1 / USART6_TX. Additional: ADC_IN4.
15 PA5 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: SPI1_SCK / USART6_RX. Additional: ADC_IN5.
16 PA6 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: SPI1_MISO / TIM3_CH1 / TIM1_BKIN / TIM16_CH1 / EVENTOUT / USART3_CTS. Additional: ADC_IN6.
17 PA7 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: SPI1_MOSI / TIM3_CH2 / TIM14_CH1 / TIM1_CH1N / TIM17_CH1 / EVENTOUT. Additional: ADC_IN7.
18 PB0 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: TIM3_CH3 / TIM1_CH2N / EVENTOUT / USART3_CK. Additional: ADC_IN8.
19 PB1 bidirectional General-purpose I/O (TTa, 3.3 V, ADC-capable). Alternate: TIM3_CH4 / TIM14_CH1 / TIM1_CH3N / USART3_RTS. Additional: ADC_IN9.
20 PB2 bidirectional General-purpose 5 V-tolerant I/O (FT). No alternate or additional functions listed.
21 PB10 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI2_SCK / I2C1_SCL / I2C2_SCL / USART3_TX.
22 PB11 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: I2C1_SDA / I2C2_SDA / EVENTOUT / USART3_RX.
23 VSS power_in Digital ground return. Pair with the adjacent VDD pin and decouple with 100 nF.
24 VDD power_in Digital power supply pin (2.4 V-3.6 V). Decouple with 100 nF close to the package.
25 PB12 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI1_NSS / SPI2_NSS / TIM1_BKIN / EVENTOUT / USART3_CK.
26 PB13 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI1_SCK / SPI2_SCK / I2C2_SCL / TIM1_CH1N / USART3_CTS.
27 PB14 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI1_MISO / SPI2_MISO / I2C2_SDA / TIM1_CH2N / TIM15_CH1 / USART3_RTS.
28 PB15 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI1_MOSI / SPI2_MOSI / TIM1_CH3N / TIM15_CH1N / TIM15_CH2. Additional: RTC_REFIN, WKUP7.
29 PA8 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: USART1_CK / TIM1_CH1 / EVENTOUT / MCO (microcontroller clock output).
30 PA9 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: USART1_TX / TIM1_CH2 / TIM15_BKIN / I2C1_SCL.
31 PA10 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: USART1_RX / TIM1_CH3 / TIM17_BKIN / I2C1_SDA.
32 PA11 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: USART1_CTS / TIM1_CH4 / EVENTOUT / I2C2_SCL.
33 PA12 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: USART1_RTS / TIM1_ETR / EVENTOUT / I2C2_SDA.
34 PA13/SWDIO bidirectional General-purpose 5 V-tolerant I/O (FT). Default after reset is SWDIO (with internal pull-up). Alternate: IR_OUT.
35 PF6 bidirectional General-purpose 5 V-tolerant I/O (FT) present on STM32F030x4/6/8. Alternate: I2C1_SCL / I2C2_SCL.
36 PF7 bidirectional General-purpose 5 V-tolerant I/O (FT) present on STM32F030x4/6/8. Alternate: I2C1_SDA / I2C2_SDA.
37 PA14/SWCLK bidirectional General-purpose 5 V-tolerant I/O (FT). Default after reset is SWCLK (with internal pull-down). Alternate: USART1_TX / USART2_TX.
38 PA15 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI1_NSS / USART1_RX / USART2_RX / USART4_RTS / EVENTOUT.
39 PB3 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI1_SCK / EVENTOUT / USART5_TX.
40 PB4 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI1_MISO / TIM3_CH1 / EVENTOUT / TIM17_BKIN / USART5_RX.
41 PB5 bidirectional General-purpose 5 V-tolerant I/O (FT). Alternate: SPI1_MOSI / I2C1_SMBA / TIM16_BKIN / TIM3_CH2 / USART5_CK_RTS. Additional: WKUP6.
42 PB6 bidirectional General-purpose 5 V-tolerant Fm+-capable I/O (FTf). Alternate: I2C1_SCL / USART1_TX / TIM16_CH1N.
43 PB7 bidirectional General-purpose 5 V-tolerant Fm+-capable I/O (FTf). Alternate: I2C1_SDA / USART1_RX / TIM17_CH1N / USART4_CTS.
44 BOOT0 input Boot memory selection input (dedicated B structure). Sampled at reset with the nBOOT1 option bit to choose between main Flash, system memory (bootloader), or embedded SRAM.
45 PB8 bidirectional General-purpose 5 V-tolerant Fm+-capable I/O (FTf). Alternate: I2C1_SCL / TIM16_CH1.
46 PB9 bidirectional General-purpose 5 V-tolerant Fm+-capable I/O (FTf). Alternate: I2C1_SDA / IR_OUT / SPI2_NSS / TIM17_CH1 / EVENTOUT.
47 VSS power_in Digital ground return. Pair with the adjacent VDD pin and decouple with 100 nF.
48 VDD power_in Digital power supply pin (2.4 V-3.6 V). Decouple with 100 nF close to the package.

Key specifications

Parameter Value
Core 32-bit Arm Cortex-M0
Max clock 48 MHz
Flash 64 KB
SRAM 8 KB
GPIO up to 39 (ports A-F)
ADC 12-bit (up to 16 ch)
Serial USART + SPI + I2C
Supply voltage 2.4-3.6 V
Package LQFP-48 (7x7 mm)

Ordering variants

Same part, different packaging or reel option.

  • STM32F030C8T6 (LQFP-48)
  • STM32F030C6T6 (LQFP-48, 32 KB)

CAD (KiCad official)

  • Symbol: MCU_ST_STM32F0:STM32F030C8Tx
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48 (KiCad packages3D)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (25 pp, sha256 8e0f78fa4556da96, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF