component
ST232BDR
Public Unreviewedby Ray
UMW RS232 ICs, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdownST232BDR
UMW · RS232 ICs · SOP-16
ST232BDR from UMW, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | C1+ | passive | Positive terminal of the voltage-doubler charge-pump capacitor C1. Connect a 0.1 µF capacitor between C1+ (pin 1) and C1- (pin 3). |
| 2 | V+ | power_out | Regulated +2·VCC (approx. +10 V) output generated by the internal charge pump. Bypass to GND with a 0.1 µF capacitor. |
| 3 | C1- | passive | Negative terminal of the voltage-doubler charge-pump capacitor C1. Paired with C1+ (pin 1) via a 0.1 µF capacitor. |
| 4 | C2+ | passive | Positive terminal of the inverter charge-pump capacitor C2. Connect a 0.1 µF capacitor between C2+ (pin 4) and C2- (pin 5). |
| 5 | C2- | passive | Negative terminal of the inverter charge-pump capacitor C2. Paired with C2+ (pin 4) via a 0.1 µF capacitor. |
| 6 | V- | power_out | Regulated -2·VCC (approx. -10 V) output generated by the internal inverting charge pump. Bypass to GND with a 0.1 µF capacitor. |
| 7 | T2OUT | output | RS-232 driver 2 output. Swings between V+ and V- (typical ±5 V into a 3 kΩ load), inverted from the T2IN TTL/CMOS input. |
| 8 | R2IN | input | RS-232 receiver 2 input. Accepts EIA/TIA-232E line levels (±30 V absolute max) with an internal 3-7 kΩ pull-down and hysteresis (VIL≈0.8 V, VIH≈2.4 V). |
| 9 | R2OUT | output | TTL/CMOS receiver 2 output (inverted from R2IN). Drives VOL ≤ 0.4 V at 3.2 mA and VOH ≥ 3.5 V at -1 mA. |
| 10 | T2IN | input | TTL/CMOS driver 2 input. High-impedance CMOS input (VIL ≤ 0.8 V, VIH ≥ 2 V) whose logic level is inverted and level-shifted to the T2OUT RS-232 line driver. |
| 11 | T1IN | input | TTL/CMOS driver 1 input. High-impedance CMOS input (VIL ≤ 0.8 V, VIH ≥ 2 V) whose logic level is inverted and level-shifted to the T1OUT RS-232 line driver. |
| 12 | R1OUT | output | TTL/CMOS receiver 1 output (inverted from R1IN). Drives VOL ≤ 0.4 V at 3.2 mA and VOH ≥ 3.5 V at -1 mA. |
| 13 | R1IN | input | RS-232 receiver 1 input. Accepts EIA/TIA-232E line levels (±30 V absolute max) with an internal 3-7 kΩ pull-down and hysteresis (VIL≈0.8 V, VIH≈2.4 V). |
| 14 | T1OUT | output | RS-232 driver 1 output. Swings between V+ and V- (typical ±5 V into a 3 kΩ load), inverted from the T1IN TTL/CMOS input. |
| 15 | GND | power_in | Device ground reference and return path for the charge-pump bypass capacitors on V+ and V-. |
| 16 | VCC | power_in | Positive supply input, +4.5 V to +5.5 V. Typical quiescent supply current ICC ≤ 10 mA (no load, 25 °C). Bypass to GND with a 0.1 µF capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-16 |
| Category | Comm/UART |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
ST232BDRST232CDR
CAD (KiCad official)
- Symbol:
ST232BDR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
st232bdr.step |
217 KB | You want the bare part, or you mark your own boards. |
st232bdr-etched.step |
2.4 MB | You want the part with ST232BDR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 601 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (10 pp, sha256
2e25f6be595237d6, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).