SP3232EEN-L from MaxLinear, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	C1+	passive	Positive terminal of the voltage-doubler charge-pump capacitor C1. Connect a 0.1uF ceramic capacitor between C1+ and C1-.
2	V+	power_out	+5.5V (typ.) charge-pump output. Bypass to GND with a 0.1uF ceramic capacitor (C3). Supplies the positive rail for the RS-232 drivers.
3	C1-	passive	Negative terminal of the voltage-doubler charge-pump capacitor C1.
4	C2+	passive	Positive terminal of the inverting charge-pump capacitor C2. Connect a 0.1uF ceramic capacitor between C2+ and C2-.
5	C2-	passive	Negative terminal of the inverting charge-pump capacitor C2.
6	V-	power_out	-5.5V (typ.) charge-pump output. Bypass to GND with a 0.1uF ceramic capacitor (C4). Supplies the negative rail for the RS-232 drivers.
7	T2OUT	output	RS-232 driver 2 output. Inverting level-shifted output that swings between V+ and V- (typ. +/-5.4V). Short-circuit protected to GND continuously.
8	R2IN	input	RS-232 receiver 2 input. Accepts +/-15V RS-232 signaling with 3-7kOhm (5k typ.) input resistance and ~300mV hysteresis.
9	R2OUT	output	TTL/CMOS receiver 2 output. Inverted logic-level output referenced to VCC; drives VCC-0.6V HIGH at IOUT=-1mA and <0.4V LOW at IOUT=1.6mA.
10	T2IN	input	TTL/CMOS driver 2 input. VIL <=0.8V, VIH >=2.0V (VCC=3.3V) or >=2.4V (VCC=5.0V). ~250mV hysteresis, no internal pull-up (tie unused inputs to VCC or GND).
11	T1IN	input	TTL/CMOS driver 1 input. VIL <=0.8V, VIH >=2.0V (VCC=3.3V) or >=2.4V (VCC=5.0V). ~250mV hysteresis, no internal pull-up (tie unused inputs to VCC or GND).
12	R1OUT	output	TTL/CMOS receiver 1 output. Inverted logic-level output referenced to VCC; drives VCC-0.6V HIGH at IOUT=-1mA and <0.4V LOW at IOUT=1.6mA.
13	R1IN	input	RS-232 receiver 1 input. Accepts +/-15V RS-232 signaling with 3-7kOhm (5k typ.) input resistance and ~300mV hysteresis.
14	T1OUT	output	RS-232 driver 1 output. Inverting level-shifted output that swings between V+ and V- (typ. +/-5.4V). Short-circuit protected to GND continuously.
15	GND	power_in	Ground reference for logic and charge-pump return.
16	VCC	power_in	3.0V to 5.5V supply input. Bypass to GND with a 0.1uF ceramic capacitor (C5) placed as close as possible to the pin. Typical supply current 0.3mA (no load, VCC=3.3V).

Key specifications

Parameter	Value
Manufacturer	MaxLinear
Package	SOIC-16
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

SP3232EEN-L
SP3232EEN-L/TR
SP3232EEN-LECY-L

CAD (KiCad official)

Symbol: SP3232EEN-L
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sp3232een-l.step`	217 KB	You want the bare part, or you mark your own boards.
`sp3232een-l-etched.step`	2.6 MB	You want the part with `SP3232EEN-L` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 645 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: MaxLinear datasheet (21 pp, sha256 657cf6a156b351de, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF