SP3220EEA-L from MaxLinear, in a SSOP-16-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	EN	input	Receiver Enable Control (active-low, /EN). Drive LOW for normal operation; drive HIGH to tri-state the receiver output R1OUT (high-Z). TTL/CMOS logic level referenced to VCC.
2	C1+	passive	Positive terminal of the voltage-doubler charge-pump capacitor. Connect a 0.1µF ceramic capacitor between C1+ (pin 2) and C1- (pin 4).
3	V+	power_out	Positive charge-pump output, nominally +5.5V generated by the internal doubler. Bypass with a 0.1µF capacitor to GND (or to VCC).
4	C1-	passive	Negative terminal of the voltage-doubler charge-pump capacitor. Connect a 0.1µF ceramic capacitor between C1+ (pin 2) and C1- (pin 4).
5	C2+	passive	Positive terminal of the inverting charge-pump capacitor. Connect a 0.1µF ceramic capacitor between C2+ (pin 5) and C2- (pin 6).
6	C2-	passive	Negative terminal of the inverting charge-pump capacitor. Connect a 0.1µF ceramic capacitor between C2+ (pin 5) and C2- (pin 6).
7	V-	power_out	Negative charge-pump output, nominally -5.5V generated by the inverter. Bypass with a 0.1µF capacitor to GND.
8	R1IN	input	RS-232 receiver input. Accepts ±15V RS-232 signaling with typical input threshold LOW 0.6/0.8V and HIGH 1.5/1.8V (at VCC=3.3V/5.0V), ~0.3V hysteresis, and 3-7kΩ input resistance to ground.
9	R1OUT	output	TTL/CMOS receiver output. Drives VOL ≤ 0.4V at IOL=1.6mA and VOH ≥ VCC-0.6V at IOH=-1.0mA. Tri-stated when /EN is HIGH; remains active in shutdown so external UARTs can be monitored.
10	NC	unconnected	No Connect. Leave floating or tie according to layout preference.
11	T1IN	input	TTL/CMOS driver input. Logic thresholds: VIL ≤ 0.8V, VIH ≥ 2.0V (VCC=3.3V) / 2.4V (VCC=5.0V). Typical input hysteresis 250mV. Datasheet recommends tying an unused input to VCC or GND.
12	NC	unconnected	No Connect. Leave floating.
13	T1OUT	output	RS-232 driver output. Delivers ±5.0V (typ ±5.4V) into a 3kΩ / 1000pF load with internally slew-rate-limited transitions (≤30V/µs). Output resistance 300Ω; short-circuit protected to ground.
14	GND	power_in	Ground reference for logic, receivers and charge pump.
15	VCC	power_in	+3.0V to +5.5V supply voltage input. Bypass to GND with a 0.1µF ceramic capacitor. Typical supply current 0.3mA (no load); ≤1µA in shutdown.
16	SHDN	input	Shutdown Control input (active-low, /SHDN). Drive HIGH for normal operation; drive LOW to shut down the driver (high-Z output) and disable the on-chip charge pump (V+ pulled to VCC, V- pulled to GND). Receiver output R1OUT remains active in shutdown.

Key specifications

Parameter	Value
Manufacturer	MaxLinear
Package	SSOP-16-208mil
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

SP3220EEA-L
SP3220EEY
SP3220ECY
SP3220EET
SP3220ECT

CAD (KiCad official)

Symbol: SP3220EEA-L
Footprint: Package_SO:SSOP-16_5.3x6.2mm_P0.65mm
3D model: SSOP-16-208mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sp3220eea-l.step`	217 KB	You want the bare part, or you mark your own boards.
`sp3220eea-l-etched.step`	2.6 MB	You want the part with `SP3220EEA-L` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 642 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: MaxLinear datasheet (18 pp, sha256 4ab6bc07e882ad10, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF