SP3078EEN-L from MaxLinear, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RO	output	Receiver Output. CMOS-level logic output of the differential receiver comparing A vs B. VOH ≥ VCC-0.6V at IO=-1mA, VOL ≤ 0.4V at IO=1mA. Tri-stated when /RE is high; failsafe HIGH when bus is open, shorted, or idle-terminated.
2	/RE	input	Receiver Enable, active-low. Drive LOW to enable the receiver output RO; drive HIGH to tri-state RO. With /RE=VCC and DE=GND the device enters shutdown (ISHDN ≈ 0.05µA typ). Hot-swap glitch protection ensures no false bus assertion during power-up.
3	DE	input	Driver Enable, active-high. Drive HIGH to enable the differential driver onto A/B; drive LOW to place A and B into a high-impedance state. Hot-swap glitch protected. VIH ≥ 2V, VIL ≤ 0.8V, 100mV typical hysteresis.
4	DI	input	Driver Input. CMOS logic-level input that sets the polarity of the differential A/B outputs when DE is asserted. VIH ≥ 2V, VIL ≤ 0.8V, IIN ±1µA. High on DI drives A high and B low.
5	GND	power_in	Ground reference (0V) for both logic and bus sections.
6	A	bidirectional	Non-inverting RS-485/RS-422 bus pin. Driver output when DE=HIGH; receiver input when DE=LOW. Common-mode range -7V to +12V, ±15kV Air-Gap/HBM and ±8kV Contact ESD protected. 96kΩ minimum receiver input resistance (1/8 unit load).
7	B	bidirectional	Inverting RS-485/RS-422 bus pin. Driver output when DE=HIGH; receiver input when DE=LOW. Common-mode range -7V to +12V, ±15kV Air-Gap/HBM and ±8kV Contact ESD protected. 96kΩ minimum receiver input resistance (1/8 unit load).
8	VCC	power_in	Supply voltage input, +3.3V ±0.3V (absolute max +6V). Typical supply current 0.8mA (1.5mA max) at no load. Bypass locally to GND with a 0.1µF ceramic capacitor.

Key specifications

Parameter	Value
Manufacturer	MaxLinear
Package	SOIC-8
Category	Interface
Pins	8

Ordering variants

Same part, different packaging or reel option.

SP3078EEN-L

CAD (KiCad official)

Symbol: SP3078EEN-L
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sp3078een-l.step`	122 KB	You want the bare part, or you mark your own boards.
`sp3078een-l-etched.step`	2.1 MB	You want the part with `SP3078EEN-L` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 531 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: MaxLinear datasheet (20 pp, sha256 860dab706abedb6e, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF