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SN74LVC1G07DRLR

Public Unreviewed

by Ray

TECH PUBLIC Logic Gates, SOT-553. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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SN74LVC1G07DRLR

TECH PUBLIC · Logic Gates · SOT-553

SN74LVC1G07DRLR from TECH PUBLIC, in a SOT-553. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection. Leave floating or tie to GND; must not be used as a signal routing node.
2 A input Logic input to the buffer. VIH ≥ 0.65×VCC (VCC=1.65-1.95 V) up to 0.7×VCC (VCC=4.5-5.5 V); VIL ≤ 0.35×VCC to 0.3×VCC over the same range. Input tolerant up to 5.5 V independent of VCC.
3 GND power_in Ground reference (0 V) for the device.
4 Y output Open-drain buffer output. Requires an external pull-up (to any rail up to 5.5 V). Sinks up to 24 mA at VCC=3.0 V (VOL ≤ 0.55 V typ) and 32 mA at VCC=4.5 V. High-Z when input is high; pulled low when input is low.
5 VCC power_in Positive supply. Operating range 1.65-5.5 V (1.5 V min for data retention only). Decouple locally with a 0.1 µF ceramic to GND.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-553
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC1G07DRLR
  • SN74LVC1G07DRLRDBVR
  • SN74LVC1G07DRLRDCKR

CAD (KiCad official)

  • Symbol: SN74LVC1G07DRLR
  • Footprint: Package_TO_SOT_SMD:SOT-553
  • 3D model: SOT-553 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (7 pp, sha256 1e794a9e8e1e44cf, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF