SN74HCT244PWR
Public Unreviewedby Ray
Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownSN74HCT244PWR
Texas Instruments · Buffer/Driver/Transceiver · TSSOP-20
SN74HCT244PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for bank 1 (buffers 1A1-1A4 → 1Y1-1Y4). When low, bank 1 outputs pass the A input data. When high, bank 1 outputs are placed in the high-impedance state. Must be tied to VCC through a pull-up for high-Z during power up/down. |
| 2 | 1A1 | input | Bank 1 buffer input 1. TTL-compatible CMOS input; buffered non-inverting to 1Y1 when 1OE is low. VIH ≥ 2 V, VIL ≤ 0.8 V at VCC = 4.5-5.5 V; input current ≤ ±1 µA. |
| 3 | 2Y4 | tri_state | Bank 2 buffer output 4. 3-state, non-inverting output driven by 2A4 when 2OE is low; high-impedance when 2OE is high. ±6 mA output drive at 5 V. |
| 4 | 1A2 | input | Bank 1 buffer input 2. TTL-compatible CMOS input; buffered non-inverting to 1Y2 when 1OE is low. |
| 5 | 2Y3 | tri_state | Bank 2 buffer output 3. 3-state, non-inverting output driven by 2A3 when 2OE is low; high-impedance when 2OE is high. |
| 6 | 1A3 | input | Bank 1 buffer input 3. TTL-compatible CMOS input; buffered non-inverting to 1Y3 when 1OE is low. |
| 7 | 2Y2 | tri_state | Bank 2 buffer output 2. 3-state, non-inverting output driven by 2A2 when 2OE is low; high-impedance when 2OE is high. |
| 8 | 1A4 | input | Bank 1 buffer input 4. TTL-compatible CMOS input; buffered non-inverting to 1Y4 when 1OE is low. |
| 9 | 2Y1 | tri_state | Bank 2 buffer output 1. 3-state, non-inverting output driven by 2A1 when 2OE is low; high-impedance when 2OE is high. |
| 10 | GND | power_in | Device ground reference (0 V). |
| 11 | 2A1 | input | Bank 2 buffer input 1. TTL-compatible CMOS input; buffered non-inverting to 2Y1 when 2OE is low. |
| 12 | 1Y4 | tri_state | Bank 1 buffer output 4. 3-state, non-inverting output driven by 1A4 when 1OE is low; high-impedance when 1OE is high. |
| 13 | 2A2 | input | Bank 2 buffer input 2. TTL-compatible CMOS input; buffered non-inverting to 2Y2 when 2OE is low. |
| 14 | 1Y3 | tri_state | Bank 1 buffer output 3. 3-state, non-inverting output driven by 1A3 when 1OE is low; high-impedance when 1OE is high. |
| 15 | 2A3 | input | Bank 2 buffer input 3. TTL-compatible CMOS input; buffered non-inverting to 2Y3 when 2OE is low. |
| 16 | 1Y2 | tri_state | Bank 1 buffer output 2. 3-state, non-inverting output driven by 1A2 when 1OE is low; high-impedance when 1OE is high. |
| 17 | 2A4 | input | Bank 2 buffer input 4. TTL-compatible CMOS input; buffered non-inverting to 2Y4 when 2OE is low. |
| 18 | 1Y1 | tri_state | Bank 1 buffer output 1. 3-state, non-inverting output driven by 1A1 when 1OE is low; high-impedance when 1OE is high. |
| 19 | 2OE | input | Active-low output enable for bank 2 (buffers 2A1-2A4 → 2Y1-2Y4). When low, bank 2 outputs pass the A input data. When high, bank 2 outputs are placed in the high-impedance state. |
| 20 | VCC | power_in | Positive supply rail, 4.5 V to 5.5 V (recommended). Absolute max 7 V. Decouple locally to GND with a 0.1 µF ceramic capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
SN74HCT244PWRSN74HCT244PWRDBSN74HCT244PWRDBRSN74HCT244PWRDWSN74HCT244PWRDWRSN74HCT244PWRNSN74HCT244PWRNSSN74HCT244PWRNSRSN74HCT244PWRDGSSN74HCT244PWRDGSRSN74HCT244PWRJSN74HCT244PWRFK
CAD (KiCad official)
- Symbol:
SN74HCT244PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sn74hct244pwr.step |
267 KB | You want the bare part, or you mark your own boards. |
sn74hct244pwr-etched.step |
2.8 MB | You want the part with SN74HCT244PWR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 727 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
5d3df17f40ffa6fd, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).