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SN74HC594DR
Public Unreviewedby Ray
Texas Instruments Shifting Register, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownSN74HC594DR
Texas Instruments · Shifting Register · SOIC-16
SN74HC594DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | QB | output | Storage register parallel output B. High-current CMOS output driven from bit B of the 8-bit D-type storage register; typical drive ±6 mA at VCC = 5 V. |
| 2 | QC | output | Storage register parallel output C. High-current CMOS output driven from bit C of the 8-bit D-type storage register. |
| 3 | QD | output | Storage register parallel output D. High-current CMOS output driven from bit D of the 8-bit D-type storage register. |
| 4 | QE | output | Storage register parallel output E. High-current CMOS output driven from bit E of the 8-bit D-type storage register. |
| 5 | QF | output | Storage register parallel output F. High-current CMOS output driven from bit F of the 8-bit D-type storage register. |
| 6 | QG | output | Storage register parallel output G. High-current CMOS output driven from bit G of the 8-bit D-type storage register. |
| 7 | QH | output | Storage register parallel output H (last bit). High-current CMOS output driven from bit H of the 8-bit D-type storage register. |
| 8 | GND | power_in | Ground reference (0 V) for the device. |
| 9 | QH' | output | Serial output from the last stage of the shift register (QH inverted / cascade output). Used to cascade multiple SN74HC594 devices for shift registers wider than 8 bits. |
| 10 | SRCLR | input | Active-low shift-register clear. Asynchronously resets all bits of the 8-bit shift register to 0 when driven low, overriding SRCLK. |
| 11 | SRCLK | input | Shift-register clock. On each positive (rising) edge, the value on SER is shifted into the first bit of the 8-bit shift register. |
| 12 | RCLK | input | Storage-register (output latch) clock. Positive edge transfers the contents of the shift register into the 8-bit D-type storage register that drives QA-QH. |
| 13 | RCLR | input | Active-low storage-register clear. Asynchronously resets all bits of the 8-bit output storage register to 0 when driven low, overriding RCLK. |
| 14 | SER | input | Serial data input. Sampled on the rising edge of SRCLK and shifted into the first bit of the 8-bit shift register. |
| 15 | QA | output | Storage register parallel output A (first bit). High-current CMOS output driven from bit A of the 8-bit D-type storage register. |
| 16 | VCC | power_in | Positive supply voltage, 2 V to 6 V recommended operating range (absolute max 7 V). Bypass with a 0.1 µF ceramic capacitor close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
SN74HC594DRSN74HC594DRDSN74HC594DRDWSN74HC594DRDWRSN74HC594DRNSN74HC594DRNE
CAD (KiCad official)
- Symbol:
SN74HC594DR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
62c6a3d5a2bda363, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).