An octal (8-bit) bus transceiver with 3-state outputs, in a SOIC-20, for driving data both ways between two buses. Eight channels connect the A bus to the B bus; a single DIR pin sets the direction (A to B when high, B to A when low) and an active-low output-enable (/OE) puts all outputs into high-impedance so several devices can share the bus. It buffers and level-isolates a microcontroller bus, drives long traces or backplanes, and protects weak drivers. Runs 2-6 V.

Pinout

Pin	Name	Type	Function
1	DIR	input	Direction control input. When DIR is high, data flows from A bus to B bus; when low, data flows from B bus to A bus. CMOS logic input, held at VCC or GND per recommended operating conditions.
2	A1	bidirectional	Channel 1 A-side data pin. Acts as input when DIR is high (transmits to B1) or output when DIR is low (driven by B1). High-impedance when OE is high.
3	A2	bidirectional	Channel 2 A-side data pin. Bidirectional; direction set by DIR, enabled by OE (active-low).
4	A3	bidirectional	Channel 3 A-side data pin. Bidirectional; direction set by DIR, enabled by OE (active-low).
5	A4	bidirectional	Channel 4 A-side data pin. Bidirectional; direction set by DIR, enabled by OE (active-low).
6	A5	bidirectional	Channel 5 A-side data pin. Bidirectional; direction set by DIR, enabled by OE (active-low).
7	A6	bidirectional	Channel 6 A-side data pin. Bidirectional; direction set by DIR, enabled by OE (active-low).
8	A7	bidirectional	Channel 7 A-side data pin. Bidirectional; direction set by DIR, enabled by OE (active-low).
9	A8	bidirectional	Channel 8 A-side data pin. Bidirectional; direction set by DIR, enabled by OE (active-low).
10	GND	power_in	Ground reference (0 V). Return path for VCC supply current and signal reference.
11	B8	bidirectional	Channel 8 B-side data pin. Bidirectional; paired with A8. Direction set by DIR, enabled by OE (active-low).
12	B7	bidirectional	Channel 7 B-side data pin. Bidirectional; paired with A7. Direction set by DIR, enabled by OE (active-low).
13	B6	bidirectional	Channel 6 B-side data pin. Bidirectional; paired with A6. Direction set by DIR, enabled by OE (active-low).
14	B5	bidirectional	Channel 5 B-side data pin. Bidirectional; paired with A5. Direction set by DIR, enabled by OE (active-low).
15	B4	bidirectional	Channel 4 B-side data pin. Bidirectional; paired with A4. Direction set by DIR, enabled by OE (active-low).
16	B3	bidirectional	Channel 3 B-side data pin. Bidirectional; paired with A3. Direction set by DIR, enabled by OE (active-low).
17	B2	bidirectional	Channel 2 B-side data pin. Bidirectional; paired with A2. Direction set by DIR, enabled by OE (active-low).
18	B1	bidirectional	Channel 1 B-side data pin. Bidirectional; paired with A1. Direction set by DIR, enabled by OE (active-low).
19	OE	input	Active-low output enable. When OE is low, transceivers are enabled per DIR; when OE is high, all A and B pins are placed in high-impedance (isolation) state. Should be tied to VCC through a pullup resistor during power-up/down to guarantee high-Z.
20	VCC	power_in	Positive supply pin. Recommended operating range 2 V to 6 V (5 V nominal). Bypass with 0.1 uF ceramic capacitor to GND.

Key specifications

Parameter	Value
Type	Octal bus transceiver, 3-state
Channels	8 (A1-A8 <-> B1-B8)
Direction	DIR pin (A->B high, B->A low)
Output enable	/OE (active-low, Hi-Z)
Logic family	HC (high-speed CMOS)
Supply voltage	2-6 V
Package	SOIC-20
Body (L×W×H)	12.8 × 7.5 × 2.35 mm

Ordering variants

Same part, different packaging or reel option.

SN74HC245DW (SOIC-20, tube)
SN74HC245DWR (SOIC-20, tape & reel)

CAD (KiCad official)

Symbol: 74xx:74HC245
Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
3D model: SOIC-20W (KiCad packages3D)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (35 pp, sha256 c78c3a1bb10a438d, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF