component

SN74HC164 Shift Register

Public Unreviewed

by Ray

8-bit serial-in, parallel-out shift register with gated serial inputs.

logicshift-registersiposerial-to-parallel74hctisoic-14
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

SN74HC164

Texas Instruments · Shift Register · SOIC-14

The SN74HC164 is an 8-bit serial-in, parallel-out (SIPO) shift register. Data clocked in on the gated serial inputs shifts through eight outputs, and an active-low clear resets all stages. It is a simple way to expand outputs from an MCU and can be cascaded for wider shifts.

Pinout

Pin Name Type Function
1 A input Gated Serial Input 1. AND-gated with input B to form the serial data fed into the first flip-flop on the rising edge of CLK. A low on either A or B inhibits new data entry and forces the first stage low on the next clock.
2 B input Gated Serial Input 2. AND-gated with input A to gate serial data into the register on the rising edge of CLK.
3 QA output Parallel output, bit A (first stage of the 8-bit shift register). CMOS push-pull output; ±4 mA drive at 5 V.
4 QB output Parallel output, bit B (second stage of the shift register).
5 QC output Parallel output, bit C (third stage of the shift register).
6 QD output Parallel output, bit D (fourth stage of the shift register).
7 GND power_in Ground reference (0 V). Must be connected to system ground.
8 CLK input Clock input. Data at the serial inputs is shifted into the register on the low-to-high transition of CLK. Maximum clock frequency 31 MHz typ at VCC = 4.5 V.
9 CLR input Active-low asynchronous clear. A low level on CLR forces all eight Q outputs low regardless of the state of CLK. Overbar in datasheet indicates active-low.
10 QE output Parallel output, bit E (fifth stage of the shift register).
11 QF output Parallel output, bit F (sixth stage of the shift register).
12 QG output Parallel output, bit G (seventh stage of the shift register).
13 QH output Parallel output, bit H (eighth/last stage of the shift register). Also serves as the serial data-out when cascading multiple 'HC164 devices.
14 VCC power_in Positive supply, 2 V to 6 V (5 V nominal). Bypass with a 0.1 uF ceramic capacitor to GND close to the pin.

Key specifications

Parameter Value
Type 8-bit serial-in parallel-out shift register
Logic family 74HC (CMOS)
Serial inputs Two, AND-gated (A and B)
Clear Active-low, asynchronous
Supply voltage 2 V to 6 V
Max clock 57 MHz typ at 5 V
Operating temperature -40 C to 85 C

Ordering variants

Same part, different packaging or reel option.

  • SN74HC164D
  • SN74HC164N
  • SN74HC164NS
  • SN74HC164PW
  • SN74HC164J
  • SN74HC164W
  • SN74HC164FK

CAD (KiCad official)

  • Symbol: sn74hc164.kicad_sym
  • Footprint: sn74hc164.kicad_mod
  • 3D model: SOIC-14 body from KiCad Package_SO/SOIC-14_3.9x8.7mm_P1.27mm.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 51860c45fddf000a, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF