SN74HC08DR
Public Unreviewedby Ray
Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownSN74HC08DR
Texas Instruments · Gates · SOIC-14
SN74HC08DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Channel 1, Input A. Standard high-impedance CMOS input to gate 1; VIH ≥ 3.15 V and VIL ≤ 1.35 V at VCC = 4.5 V. Must not be left floating. |
| 2 | 1B | input | Channel 1, Input B. Standard CMOS input to gate 1; combined with 1A to produce 1Y = 1A · 1B. |
| 3 | 1Y | output | Channel 1, Output Y. Balanced CMOS push-pull output; drives ±4 mA at VCC = 4.5 V while meeting VOH ≥ 3.84 V / VOL ≤ 0.33 V (-40 °C to 85 °C). |
| 4 | 2A | input | Channel 2, Input A. Standard high-impedance CMOS input to gate 2. |
| 5 | 2B | input | Channel 2, Input B. Standard CMOS input to gate 2; combined with 2A to produce 2Y = 2A · 2B. |
| 6 | 2Y | output | Channel 2, Output Y. Balanced CMOS push-pull output for gate 2. |
| 7 | GND | power_in | Device ground reference. 0 V return for the logic core and output drivers; continuous current through VCC or GND is limited to ±50 mA (absolute max). |
| 8 | 3Y | output | Channel 3, Output Y. Balanced CMOS push-pull output for gate 3. |
| 9 | 3A | input | Channel 3, Input A. Standard high-impedance CMOS input to gate 3. |
| 10 | 3B | input | Channel 3, Input B. Standard CMOS input to gate 3; combined with 3A to produce 3Y = 3A · 3B. |
| 11 | 4Y | output | Channel 4, Output Y. Balanced CMOS push-pull output for gate 4. |
| 12 | 4A | input | Channel 4, Input A. Standard high-impedance CMOS input to gate 4. |
| 13 | 4B | input | Channel 4, Input B. Standard CMOS input to gate 4; combined with 4A to produce 4Y = 4A · 4B. |
| 14 | VCC | power_in | Positive supply. Operating range 2 V to 6 V (5 V nominal); absolute maximum 7 V. Bypass locally to GND with a ceramic capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
SN74HC08DRDSN74HC08DRSN74HC08DRDBSN74HC08DRDBRSN74HC08DRNSN74HC08DRNSSN74HC08DRNSRSN74HC08DRPWSN74HC08DRPWRSN74HC08DRFKSN74HC08DRJSN74HC08DRW
CAD (KiCad official)
- Symbol:
SN74HC08DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sn74hc08dr.step |
195 KB | You want the bare part, or you mark your own boards. |
sn74hc08dr-etched.step |
2.5 MB | You want the part with SN74HC08DR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 612 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
7c6d615e4510b91b, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).