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SN74HC00
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TI quad 2-input NAND gate, SOIC-14. HC CMOS, Y = NOT(A AND B), 2-6 V. Datasheet-verified.
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markdownSN74HC00
Texas Instruments · Quad 2-input NAND gate · SOIC-14
Four independent 2-input NAND gates in high-speed CMOS logic, in a SOIC-14 package. Each gate computes Y = NOT(A AND B). NAND is functionally complete, so this one part builds any logic function, and it is the go-to for simple gating, set-reset latches, and RC oscillators. Runs 2-6 V and drives TTL/CMOS loads directly.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Channel 1, Input A. CMOS logic input to NAND gate 1 (V_IH >= 3.15 V @ Vcc=4.5 V; V_IL <= 1.35 V @ Vcc=4.5 V). Input leakage +/-0.1 uA typ, +/-1000 nA max. |
| 2 | 1B | input | Channel 1, Input B. CMOS logic input to NAND gate 1, paired with 1A. |
| 3 | 1Y | output | Channel 1, Output Y. Push-pull CMOS output equal to NOT(1A AND 1B). Balanced drive of +/-5.2 mA at Vcc = 6 V. |
| 4 | 2A | input | Channel 2, Input A. CMOS logic input to NAND gate 2. |
| 5 | 2B | input | Channel 2, Input B. CMOS logic input to NAND gate 2, paired with 2A. |
| 6 | 2Y | output | Channel 2, Output Y. Push-pull CMOS output equal to NOT(2A AND 2B). |
| 7 | GND | power_in | Ground reference (0 V). Continuous current through GND limited to +/-50 mA. |
| 8 | 3Y | output | Channel 3, Output Y. Push-pull CMOS output equal to NOT(3A AND 3B). |
| 9 | 3A | input | Channel 3, Input A. CMOS logic input to NAND gate 3. |
| 10 | 3B | input | Channel 3, Input B. CMOS logic input to NAND gate 3, paired with 3A. |
| 11 | 4Y | output | Channel 4, Output Y. Push-pull CMOS output equal to NOT(4A AND 4B). |
| 12 | 4A | input | Channel 4, Input A. CMOS logic input to NAND gate 4. |
| 13 | 4B | input | Channel 4, Input B. CMOS logic input to NAND gate 4, paired with 4A. |
| 14 | VCC | power_in | Positive supply. Recommended 2 V to 6 V (5 V nominal); absolute max 7 V. Decouple to GND with a 100 nF ceramic capacitor close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Type | Quad 2-input NAND gate |
| Function | Y = NOT(A AND B) |
| Logic family | HC (high-speed CMOS) |
| Supply voltage | 2-6 V |
| Gates | 4 independent |
| Package | SOIC-14 |
| Body (L×W×H) | 8.65 × 3.9 × 1.75 mm |
Ordering variants
Same part, different packaging or reel option.
SN74HC00D (SOIC-14, tube)SN74HC00DR (SOIC-14, tape & reel)
CAD (KiCad official)
- Symbol:
74xx:74HC00 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
706cc4f5fd012f08, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude) — every pin and dimension is cited to a datasheet page; refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).