SN74CB3Q3384APWR
Public Unreviewedby Ray
Texas Instruments Signal Switches / Encoders & Decoders / Multiplexers, TSSOP-24. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdownSN74CB3Q3384APWR
Texas Instruments · Signal Switches / Encoders & Decoders / Multiplexers · TSSOP-24
SN74CB3Q3384APWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for bank 1 (1A1-1A5 ↔ 1B1-1B5). When low, the associated 5-bit FET switch is ON (A = B). When high, the switch is OFF (high-Z between A and B ports). Should be tied to VCC through a pullup during power-up/down to guarantee high-Z. |
| 2 | 1B1 | bidirectional | Bank 1 B-side switch port bit 1. Bidirectional FET switch terminal; connects to 1A1 when 1OE is low. Supports 0-5 V signalling depending on VCC. |
| 3 | 1A1 | bidirectional | Bank 1 A-side switch port bit 1. Bidirectional FET switch terminal; connects to 1B1 when 1OE is low. |
| 4 | 1A2 | bidirectional | Bank 1 A-side switch port bit 2. Bidirectional FET switch terminal; connects to 1B2 when 1OE is low. |
| 5 | 1B2 | bidirectional | Bank 1 B-side switch port bit 2. Bidirectional FET switch terminal; connects to 1A2 when 1OE is low. |
| 6 | 1B3 | bidirectional | Bank 1 B-side switch port bit 3. Bidirectional FET switch terminal; connects to 1A3 when 1OE is low. |
| 7 | 1A3 | bidirectional | Bank 1 A-side switch port bit 3. Bidirectional FET switch terminal; connects to 1B3 when 1OE is low. |
| 8 | 1A4 | bidirectional | Bank 1 A-side switch port bit 4. Bidirectional FET switch terminal; connects to 1B4 when 1OE is low. |
| 9 | 1B4 | bidirectional | Bank 1 B-side switch port bit 4. Bidirectional FET switch terminal; connects to 1A4 when 1OE is low. |
| 10 | 1B5 | bidirectional | Bank 1 B-side switch port bit 5. Bidirectional FET switch terminal; connects to 1A5 when 1OE is low. |
| 11 | 1A5 | bidirectional | Bank 1 A-side switch port bit 5. Bidirectional FET switch terminal; connects to 1B5 when 1OE is low. |
| 12 | GND | power_in | Ground reference for the device (0 V). |
| 13 | 2OE | input | Active-low output enable for bank 2 (2A1-2A5 ↔ 2B1-2B5). When low, the associated 5-bit FET switch is ON. When high, the switch is OFF (high-Z). Should be tied to VCC through a pullup during power-up/down to guarantee high-Z. |
| 14 | 2A1 | bidirectional | Bank 2 A-side switch port bit 1. Bidirectional FET switch terminal; connects to 2B1 when 2OE is low. |
| 15 | 2B1 | bidirectional | Bank 2 B-side switch port bit 1. Bidirectional FET switch terminal; connects to 2A1 when 2OE is low. |
| 16 | 2B2 | bidirectional | Bank 2 B-side switch port bit 2. Bidirectional FET switch terminal; connects to 2A2 when 2OE is low. |
| 17 | 2A2 | bidirectional | Bank 2 A-side switch port bit 2. Bidirectional FET switch terminal; connects to 2B2 when 2OE is low. |
| 18 | 2A3 | bidirectional | Bank 2 A-side switch port bit 3. Bidirectional FET switch terminal; connects to 2B3 when 2OE is low. |
| 19 | 2B3 | bidirectional | Bank 2 B-side switch port bit 3. Bidirectional FET switch terminal; connects to 2A3 when 2OE is low. |
| 20 | 2B4 | bidirectional | Bank 2 B-side switch port bit 4. Bidirectional FET switch terminal; connects to 2A4 when 2OE is low. |
| 21 | 2A4 | bidirectional | Bank 2 A-side switch port bit 4. Bidirectional FET switch terminal; connects to 2B4 when 2OE is low. |
| 22 | 2A5 | bidirectional | Bank 2 A-side switch port bit 5. Bidirectional FET switch terminal; connects to 2B5 when 2OE is low. |
| 23 | 2B5 | bidirectional | Bank 2 B-side switch port bit 5. Bidirectional FET switch terminal; connects to 2A5 when 2OE is low. |
| 24 | VCC | power_in | Supply voltage. Recommended operating range 2.3 V to 3.6 V (absolute max 4.6 V). Powers the charge pump that drives the pass-transistor gates. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-24 |
| Category | Logic |
| Pins | 24 |
Ordering variants
Same part, different packaging or reel option.
SN74CB3Q3384APWRSN74CB3Q3384APWRADBQRSN74CB3Q3384APWRADGVRSN74CB3Q3384APWRADGVRG4
CAD (KiCad official)
- Symbol:
SN74CB3Q3384APWR - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sn74cb3q3384apwr.step |
315 KB | You want the bare part, or you mark your own boards. |
sn74cb3q3384apwr-etched.step |
4.2 MB | You want the part with SN74CB3Q3384APWR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1035 faces against 387 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (18 pp, sha256
a9a2d29e25a59875, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).