SN74AHC123APWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Channel 1 falling-edge trigger input (active-low, denoted 1A-bar). Triggers a one-shot pulse when 1B = H. Hold low for other input methods. Schmitt-trigger input.
2	1B	input	Channel 1 rising-edge trigger input. Triggers a one-shot pulse when 1A-bar = L. Hold high for other input methods. Schmitt-trigger input.
3	1CLR	input	Channel 1 active-low clear/rising-edge trigger input (1CLR-bar). Triggers rising-edge when 1A-bar = L and 1B = H. Driving low terminates the output pulse. Hold high for other input methods. Schmitt-trigger input.
4	1Q	output	Channel 1 inverted output (1Q-bar). Complementary to 1Q.
5	2Q	output	Channel 2 non-inverted output. Delivers the timed one-shot pulse for channel 2.
6	2Cext	passive	Channel 2 external timing capacitor negative connection. Connect the external Cext capacitor between this pin and pin 7 (2Rext/Cext).
7	2Rext/Cext	passive	Channel 2 external capacitor and timing resistor junction. Rext connects between this pin and VCC (Rext >= 5 kΩ at VCC=2 V, >= 1 kΩ at VCC>3 V); Cext connects between this pin and 2Cext.
8	GND	power_in	Ground reference (0 V). Return for VCC and all logic signals.
9	2A	input	Channel 2 falling-edge trigger input (active-low, 2A-bar). Triggers a one-shot pulse when 2B = H. Hold low for other input methods. Schmitt-trigger input.
10	2B	input	Channel 2 rising-edge trigger input. Triggers a one-shot pulse when 2A-bar = L. Hold high for other input methods. Schmitt-trigger input.
11	2CLR	input	Channel 2 active-low clear/rising-edge trigger input (2CLR-bar). Triggers rising-edge when 2A-bar = L and 2B = H. Driving low terminates the output pulse. Hold high for other input methods. Schmitt-trigger input.
12	2Q	output	Channel 2 inverted output (2Q-bar). Complementary to 2Q.
13	1Q	output	Channel 1 non-inverted output. Delivers the timed one-shot pulse for channel 1.
14	1Cext	passive	Channel 1 external timing capacitor negative connection. Connect the external Cext capacitor between this pin and pin 15 (1Rext/Cext).
15	1Rext/Cext	passive	Channel 1 external capacitor and timing resistor junction. Rext connects between this pin and VCC (>= 5 kΩ at VCC=2 V, >= 1 kΩ at VCC>3 V); Cext connects between this pin and 1Cext.
16	VCC	power_in	Positive supply voltage. Operating range 2 V to 5.5 V. Bypass to GND with a local decoupling capacitor.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Logic
Pins	16

Ordering variants

Same part, different packaging or reel option.

SN74AHC123APWR
SN74AHC123APWRD
SN74AHC123APWRDB
SN74AHC123APWRDGV
SN74AHC123APWRN
SN74AHC123APWRFK
SN74AHC123APWRJ
SN74AHC123APWRW

CAD (KiCad official)

Symbol: SN74AHC123APWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sn74ahc123apwr.step`	205 KB	You want the bare part, or you mark your own boards.
`sn74ahc123apwr-etched.step`	2.8 MB	You want the part with `SN74AHC123APWR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 718 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (36 pp, sha256 1a0b625278e7d4c2, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF