SN74ACT244PWR
Public Unreviewedby Ray
Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownSN74ACT244PWR
Texas Instruments · Buffer/Driver/Transceiver · TSSOP-20
SN74ACT244PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for buffer bank 1 (1Y1-1Y4). When low, 1A inputs pass to 1Y outputs; when high, 1Y outputs are Hi-Z. TTL-compatible input, VIH >= 2 V, VIL <= 0.8 V at 5 V VCC. |
| 2 | 1A1 | input | Bank 1 buffer channel 1 data input. TTL-compatible, non-inverting to 1Y1 when 1OE is low. Must not exceed VCC. |
| 3 | 2Y4 | tri_state | Bank 2 buffer channel 4 3-state output. Drives non-inverted 2A4 data when 2OE is low; Hi-Z when 2OE is high. Rated 24 mA source/sink at 5 V VCC. |
| 4 | 1A2 | input | Bank 1 buffer channel 2 data input. TTL-compatible, non-inverting to 1Y2 when 1OE is low. |
| 5 | 2Y3 | tri_state | Bank 2 buffer channel 3 3-state output. Drives non-inverted 2A3 data when 2OE is low; Hi-Z when 2OE is high. Rated 24 mA source/sink at 5 V VCC. |
| 6 | 1A3 | input | Bank 1 buffer channel 3 data input. TTL-compatible, non-inverting to 1Y3 when 1OE is low. |
| 7 | 2Y2 | tri_state | Bank 2 buffer channel 2 3-state output. Drives non-inverted 2A2 data when 2OE is low; Hi-Z when 2OE is high. Rated 24 mA source/sink at 5 V VCC. |
| 8 | 1A4 | input | Bank 1 buffer channel 4 data input. TTL-compatible, non-inverting to 1Y4 when 1OE is low. |
| 9 | 2Y1 | tri_state | Bank 2 buffer channel 1 3-state output. Drives non-inverted 2A1 data when 2OE is low; Hi-Z when 2OE is high. Rated 24 mA source/sink at 5 V VCC. |
| 10 | GND | power_in | Device ground reference. Connect to 0 V rail with a local decoupling cap between VCC (pin 20) and GND. |
| 11 | 2A1 | input | Bank 2 buffer channel 1 data input. TTL-compatible, non-inverting to 2Y1 when 2OE is low. |
| 12 | 1Y4 | tri_state | Bank 1 buffer channel 4 3-state output. Drives non-inverted 1A4 data when 1OE is low; Hi-Z when 1OE is high. Rated 24 mA source/sink at 5 V VCC. |
| 13 | 2A2 | input | Bank 2 buffer channel 2 data input. TTL-compatible, non-inverting to 2Y2 when 2OE is low. |
| 14 | 1Y3 | tri_state | Bank 1 buffer channel 3 3-state output. Drives non-inverted 1A3 data when 1OE is low; Hi-Z when 1OE is high. Rated 24 mA source/sink at 5 V VCC. |
| 15 | 2A3 | input | Bank 2 buffer channel 3 data input. TTL-compatible, non-inverting to 2Y3 when 2OE is low. |
| 16 | 1Y2 | tri_state | Bank 1 buffer channel 2 3-state output. Drives non-inverted 1A2 data when 1OE is low; Hi-Z when 1OE is high. Rated 24 mA source/sink at 5 V VCC. |
| 17 | 2A4 | input | Bank 2 buffer channel 4 data input. TTL-compatible, non-inverting to 2Y4 when 2OE is low. |
| 18 | 1Y1 | tri_state | Bank 1 buffer channel 1 3-state output. Drives non-inverted 1A1 data when 1OE is low; Hi-Z when 1OE is high. Rated 24 mA source/sink at 5 V VCC. |
| 19 | 2OE | input | Active-low output enable for buffer bank 2 (2Y1-2Y4). When low, 2A inputs pass to 2Y outputs; when high, 2Y outputs are Hi-Z. Tie to VCC via pullup during power-up/down for guaranteed Hi-Z. |
| 20 | VCC | power_in | Positive supply, 4.5 V to 5.5 V recommended operating range (7 V absolute max). Bypass with a 0.1 uF ceramic capacitor to GND close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
SN74ACT244PWRSN74ACT244PWRDGSSN74ACT244PWRDGSRSN74ACT244PWRDBSN74ACT244PWRDBRSN74ACT244PWRDWSN74ACT244PWRDWRSN74ACT244PWRNSN74ACT244PWRNSSN74ACT244PWRNSRSN74ACT244PWRRKSSN74ACT244PWRRKSRSN74ACT244PWRJSN74ACT244PWRWSN74ACT244PWRFK
CAD (KiCad official)
- Symbol:
SN74ACT244PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sn74act244pwr.step |
267 KB | You want the bare part, or you mark your own boards. |
sn74act244pwr-etched.step |
2.8 MB | You want the part with SN74ACT244PWR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 726 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
01c87f92eb3778ab, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).