SM8082AAAC
Public Unreviewedby Ray
Silergy Corp DC-DC Converters, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownSM8082AAAC
Silergy Corp · DC-DC Converters · SOT-23-5
SM8082AAAC from Silergy Corp, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable control input. Pull high (VEN,H ≥ 1.2V) to turn the regulator on; drive low (VEN,L ≤ 0.4V) to shut down (shutdown current 0.1µA typ). Do not leave floating; add a 1MΩ pull-down to GND when the driving source can be high-Z. |
| 2 | GND | power_in | Ground return pin for the IC and the internal low-side synchronous FET. Maximize copper connection to GND plane for best thermal and noise performance. |
| 3 | LX | output | Switching-node output of the internal power stage. Connect to the external inductor (typ. 1.0µH). PCB copper area on this net must be minimized to avoid noise coupling. Absolute LX range -0.3V to 6.0V (tested to -3V/+7V for <40ns transients). |
| 4 | IN | power_in | Power supply input, 2.5V to 5.5V operating range (absolute max 6.0V). Decouple to GND with at least a 10µF X5R ceramic capacitor placed close to the IN/GND pins to minimize loop area. |
| 5 | FB | input | Output voltage feedback pin. Connect to the mid-point of the output resistor divider (RH from VOUT to FB, RL from FB to GND) to program VOUT = 0.6 × (1 + RH/RL). Internal reference VREF = 0.6V (588-612mV). Keep this trace away from LX to avoid noise pickup. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
SM8082AAAC
CAD (KiCad official)
- Symbol:
SM8082AAAC - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sm8082aaac.step |
85 KB | You want the bare part, or you mark your own boards. |
sm8082aaac-etched.step |
2.1 MB | You want the part with SM8082AAAC already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 514 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (10 pp, sha256
3d1af3cb0c77bf0a, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).