SLM2005ECA-DG from Sillumin, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC	power_in	Low-side and logic fixed supply. Recommended operating range 10 V to 18 V (absolute max 20 V), referenced to COM. Bypass locally to COM with a ceramic capacitor. UVLO thresholds are typ. 8.8 V rising / 8.3 V falling.
2	HIN	input	Logic input for the high-side gate driver output (HO); output is in phase with this input. CMOS/LSTTL compatible with VIH >= 2.5 V, VIL <= 0.8 V, absolute max 10 V, referenced to COM.
3	LIN	input	Logic input for the low-side gate driver output (LO); output is in phase with this input. CMOS/LSTTL compatible with VIH >= 2.5 V, VIL <= 0.8 V, absolute max 10 V, referenced to COM.
4	COM	power_in	Low-side return / device ground. All voltage parameters (VCC, VIN, VLO) are referenced to this pin.
5	LO	output	Low-side gate drive output. Drives the gate of the low-side N-channel MOSFET/IGBT between COM and VCC (typ. 10-18 V swing). Source ~1 A / sink ~1.5 A peak pulsed.
6	VS	power_in	High-side floating supply return. Connects to the source of the high-side N-channel MOSFET/IGBT and to the negative terminal of the bootstrap capacitor. May swing up to +200 V above COM; tolerates negative transient dV/dt up to 50 V/ns.
7	HO	output	High-side gate drive output. Drives the gate of the high-side N-channel MOSFET/IGBT between VS and VB (typ. 10-18 V swing above VS). Source ~1 A / sink ~1.5 A peak pulsed.
8	VB	power_in	High-side floating supply (bootstrap rail). Connect a bootstrap capacitor between VB and VS and a bootstrap diode from VCC to VB. Operating range VS+10 V to VS+18 V; absolute max 220 V to COM. VBS UVLO thresholds typ. 4.8 V rising / 4.3 V falling.

Key specifications

Parameter	Value
Manufacturer	Sillumin
Package	SOP-8
Category	PMIC
Pins	8

Ordering variants

Same part, different packaging or reel option.

SLM2005ECA-DG

CAD (KiCad official)

Symbol: SLM2005ECA-DG
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`slm2005eca-dg.step`	122 KB	You want the bare part, or you mark your own boards.
`slm2005eca-dg-etched.step`	2.5 MB	You want the part with `SLM2005ECA-DG` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 618 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Sillumin datasheet (9 pp, sha256 cebafaad03400358, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF