SIT65HVD230DR from SIT, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	D	input	CAN transmit data input (TXD, driver input). LOW drives the bus to the dominant state; HIGH leaves the bus recessive. Input current IIH ≥ -30 µA at VI=2 V, IIL ≥ -30 µA at VI=0.8 V.
2	GND	power_in	Ground connection; reference for all device voltages.
3	VCC	power_in	Transceiver 3.3 V supply voltage. Operating range 3.0 V to 3.6 V. Typical ICC ≈ 10 mA active (no load), ≈ 650 µA in standby.
4	R	output	CAN receive data output (RXD, receiver output). LOW indicates a dominant bus state; HIGH indicates recessive. High-level VOH ≥ 2.4 V at IO=-8 mA; low-level VOL ≤ 0.4 V at IO=8 mA.
5	Vref	output	VCC/2 reference output pin. Typically 0.45·VCC to 0.55·VCC for
6	CANL	bidirectional	Low-level CAN bus line. Differential I/O to the CAN bus per ISO 11898-2, driven low in dominant state and pulled to ~VCC/2 in recessive state. Withstands -18 V to +18 V DC and ±25 V transient; ESD >±15 kV HBM.
7	CANH	bidirectional	High-level CAN bus line. Differential I/O to the CAN bus per ISO 11898-2, driven high in dominant state and pulled to ~VCC/2 in recessive state. Withstands -18 V to +18 V DC and ±25 V transient; ESD >±15 kV HBM.
8	Rs	input	Mode select pin. Strong pull-down to GND (V(Rs)<1.2 V) selects high-speed mode; strong pull-up to VCC (V(Rs)>0.75·VCC) selects low-power standby mode; a 10 kΩ to 100 kΩ pull-down to GND selects slope-control mode for reduced EMI. IRS ≥ -450 µA when V(Rs)<1 V.

Key specifications

Parameter	Value
Manufacturer	SIT
Package	SOP-8
Category	Interface
Pins	8

Ordering variants

Same part, different packaging or reel option.

SIT65HVD230DR

CAD (KiCad official)

Symbol: SIT65HVD230DR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sit65hvd230dr.step`	122 KB	You want the bare part, or you mark your own boards.
`sit65hvd230dr-etched.step`	2.7 MB	You want the part with `SIT65HVD230DR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 656 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: SIT datasheet (15 pp, sha256 9a0e27d9fc477e71, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF